Noriaki Matsunaga

Synthesis of a Closely Packed Carbon Nanotube Forest by a Multi-Step Growth Method Using Plasma-Based Chemical Vapor Deposition

We report a synthesis of a closely packed multi-walled carbon nanotube (MWCNT) forest by a multi-step growth method, including a new approach to immobilize catalytic nanoparticles, using plasma-based chemical vapor deposition. The CNT packing density reaches one-half of the theoretical value, where the space of 30–40% is filled with MWCNTs. This value is approximately one order of magnitude larger than that of as-grown CNT forest synthesized using conventional methods. The method is applicable even at a spatially restricted region, for example, in trench or via hole, and is available at the growth temperature as low as 450 °C.

Cost-effective air-gap interconnects by all-in-one post-removing process

Low process cost air-gap structure for multilevel interconnect system is proposed by all-in-one post-removing process. Problems regarding the air-gap process were studied and solutions for moisture uptake and for metal wiring oxidation were developed. The proposed air-gap process is compatible with the conventional BEOL process. Furthermore, this process can build the air-gap structure with least additional process steps, and it tolerates misalignment.

Impact of film structure on damage to low-k SiOCH film during plasma exposure

We investigated the resistance of a low-k SiOCH film structure to plasma-irradiation damage by comparing films deposited by neutral-beam enhanced chemical-vapour-deposition (NBECVD) and conventional plasma CVD techniques to clarify the degradation mechanism of the dielectric constant in low dielectric SiOCH film during plasma etching. We found that the durability of a low-k SiOCH film structure to plasma irradiation strongly depended on the kind of Si–O structure the film had. In particular, a linear Si–O structure was less affected by plasma exposure than were network/cage Si–O structures because of the small amount of stress in the O–Si–O structure. In addition, this linear Si–O structure helped to reduce the number of methyl groups removed from the film by plasma irradiation, which preserved the dielectric constant. Since the NBECVD technique can generate a low-k SiOCH film with more linear Si–O structures than conventional plasma CVD, a film made through this technique has very strong plasma durability.

Super-low-k SiOCH film (k = 1.9) with extremely high water resistance and thermal stability formed by neutral-beam-enhanced CVD

We developed a neutral-beam-enhanced method of chemical vapour deposition (NBECVD) to obtain a lower dielectric constant for the SiOCH interlayer dielectric film while maintaining a reasonable modulus. We achieved a higher deposition rate than that with the precursor of dimethyl-dimethoxy-silane (DMDMOS) we previously reported on by using Ar NBECVD with a precursor of dimethoxy-tetramethyl-disiloxine (DMOTMDS). This is because of the high absorption coefficient of DMOTMDS. Ar NBECVD with DMOTMDS also achieved a much lower dielectric constant than the conventional PECVD film, because this method avoids the precursor dissociation that causes low dielectric film with many linear Si?O structures. We obtained a k value of 1.9 for the super-low-k SiOCH film with an extremely water resistant, and very thermally stable and integration-possible modulus (>4?GPa) by controlling the bias power.

Fabrication of 70-nm-diameter carbon nanotube via interconnects by remote plasma-enhanced chemical vapor deposition and their electrical properties

We have succeeded in fabricating ultrafine carbon nanotube (CNT) via interconnects with SiOC interlayer dielectrics. High-quality multiwalled CNTs are grown in via holes with a diameter of 70 nm using pulse-exited remote plasma-enhanced chemical vapor deposition at 450 °C. The resistance of a 70-nm-diameter CNT via is 52 Ω, which is the lowest ever reported for CNT via interconnects. The CNT via interconnect has the capability to sustain current density as high as 1×108 A/cm2.

Structure-designable method to form super low-k SiOC film (k = 2.2) by neutral-beam-enhanced chemical vapour deposition

To precisely control the dielectric constant and the structure of a low-k SiOC film, we have developed a neutral-beam-enhanced chemical vapour deposition (NBECVD) method. Using Ar NBECVD, we can precisely control the dielectric constant and the film modulus of low-k SiOC deposited on Si substrates because this method avoids precursor dissociation that results from electron collisions and UV photons in plasma. Optimizing the ratio between Si–O and Si–(CH3)x as well as the proportions of linear (two-dimensional SiOC), network and cage (three-dimensional SiOC) structures by changing the precursor, we obtained a k value of 2.2 and a reasonable modulus by using dimethyl dimethoxy silane as a precursor. Additionally, the NBECVD process is applicable as a method for damage-free super-low-k film deposition on the underlying low-k film that is sensitive to damage by the plasma.

BEOL process integration technology for 45 nm node porous low-k/copper interconnects

Highly reliable BEOL integration technology with porous low-k (k=2.3) was realized by development focusing on plasma damage control and moisture control. A hybrid dielectric scheme with damage resistant porous low-k films and buffer film was applied in view of its inherent advantages for realizing reliable porous low-k integration. A metallization process was developed from the viewpoint of suppressing morphology and adhesion degradation of barrier metal by oxidation. A dummy wiring pattern was also adopted to remove moisture absorbed in porous low-k films. Stress-migration and electromigration satisfying practical reliability were obtained with via size of 75 nm for the first time by utilizing all possible measures for reducing the damage and the moisture.

Highly reliable PVD/ALD/PVD stacked barrier metal structure for 45-nm node copper dual-damascene interconnects

In this paper, we describe highly reliable barrier metal structure for 45nm-node (140nm pitch) high performance copper interconnects. Issues and solutions for utilizing TaN barrier metal by atomic-layer deposition (ALD) process, which is the key technology for scaling down the barrier metal thickness, on low-k ILD materials were investigated. PVD/ALD/PVD stacked barrier metal structure was proposed from the viewpoint of factors affecting reliability such as stress-induced voiding (SiV) and electromigration (EM) endurance, and realized lower wiring resistance than that is attainable with the conventional process. We distinguished the role of each PVD film, and suggest the optimal barrier metal structure to realize highly reliable Cu dual-damascene interconnects.

Hard-Mask-Through UV-Light-Induced Damage to Low-k Film during Plasma Process for Dual Damascene

Plasma irradiation impact on a SiO2-hardmask/SiOCH low-k film stacked structure was investigated in detail. The plasma irradiation induces damage to the low-k film although it is covered by a hard mask. The hard-mask-through UV-light-induced damage showed plasma source gas dependence. The damage is determined by the UV light wavelength and photon energy. It was also found that a high substrate temperature accelerates the hard-mask-through UV-light-induced damage. The hard-mask-through UV-light-induced damage was hardly seen for the hard masks thicker than 115 nm in the O2-irradiation experiment. Conversely, an actual SiO2 film deposition process by plasma-enhanced chemical vapor deposition (PE-CVD) induces damage during deposition. The PE-CVD process induces heavier damage to the low-k film than the O2-plasma experiment. Higher process temperature accelerates the hard-mask-through UV-light-induced damage in the hard mask SiO2 deposition process.

Spreading Antenna Effect of PID in Damascene Interconnect Process

Plasma-induced charging damage (PID) in a damascene interconnect process was investigated in detail. We found that the antenna area dependence of the PID in the damascene interconnect process is not a simple relation to the upper surface area of the metal wiring. Since the charges are injected through the dielectric films on the wiring, the effective antenna area that can collect the charges became larger than the area that is defined by the upper surface area of the metal wiring. The effective antenna area was studied by electrical field simulation, and a spreading antenna width was proposed and defined.