R. Bellens

New insights in the relation between electron trap generation and the statistical properties of oxide breakdown

In this paper it is demonstrated in a wide stress field range that breakdown in thin oxide layers occurs as soon as a critical density of neutral electron traps in the oxide is reached. It is proven that this corresponds to a critical hole fluence, since a unique relationship between electron trap generation and hole fluence is found independent of stress field and oxide thickness. In this way literature models relating breakdown to hole fluence or to trap generation are linked. A new model for intrinsic breakdown, based on a percolation concept, is proposed. It is shown that this model can explain the experimentally observed statistical features of the breakdown distribution, such as the increasing spread of the Q/sub BD/-distribution for ultrathin oxides. An important consequence of this large spread is the strong area dependence of the Q/sub BD/ for ultrathin oxides.

Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFETs

A model is derived using the charge-pumping technique for the evaluation of the interface characteristics, in combination with the behavior of the drain and the substrate currents after degradation. For n-channel transistors the degradation is mainly caused by the generation of interface traps. Only in the region of hole injection (V/sub g/ approximately=V/sub t/) is the degradation dominated by the trapped holes, which mask the effect of the generated interface traps. The degradation of p-channel transistors, although completely different at first sight, occurs by the same mechanisms. For this case, the degradation is caused by trapped negative charge, which masks the influence of the interface traps. The latter are nevertheless generated in comparable amounts as in n-channel transistors. Based on these insights, improved procedures for accelerated-lifetime experiments are proposed for both channel types. Finally, the peculiar degradation behavior of n-channel transistors under alternating injection conditions is discussed and fully explained based on the static stress degradation model. >

A consistent model for the thickness dependence of intrinsic breakdown in ultra-thin oxides

A consistent model for the intrinsic time dependent dielectric breakdown (TDDB) of thin oxides is introduced. This model links the existing anode hole injection and the electron trap generation models together and describes wearout as a hole induced generation of electron traps. Breakdown is defined as conduction via these traps from one interface to the other. Implementing the model in a simulator, the oxide thickness dependence of the Weibull slope of the Q/sub BD/-distribution is predicted, and, using the unique relationship between hole fluence and generated electron trap density, the decrease of the critical hole fluence with oxide thickness is explained.

A new model for the field dependence of intrinsic and extrinsic time-dependent dielectric breakdown

The field acceleration of intrinsic and extrinsic breakdown is studied. For the intrinsic mode an exp(1/E)-acceleration law is found, while for the extrinsic mode an new exp (E)-acceleration law for Q/sub BD/ is proposed. This field acceleration model is implemented in a maximum likelihood algorithm together with a new analytical expression for fitting competing Weibull distributions. With this algorithm an extensive t/sub BD/-data set measured at different stress conditions can be fitted excellently in one single calculation. From the result, predictions of low-field oxide reliability are made and the screening conditions in order to guarantee a pre-set reliability specification are calculated.

The influence of the measurement setup on enhanced AC hot carrier degradation of MOSFETs

It is shown that the enhanced degradation and substrate current component, which is observed in several AC experiments at the falling edge of the gate pulse under high drain bias, can in some cases be primarily ascribed to a carrier injection due to the forward biasing of the source diode and a simultaneous drain voltage overshoot. The forward biasing of the source diode is not caused by the commonly known latch-up effect, which is triggered by the substrate current, but by an insufficient AC coupling of the source to the ground due to the parasitic inductance of the wiring. It is demonstrated that by putting a capacitor at the drain side of the transistor and grounding the source at the probe tip, the observed enhanced substrate current can be eliminated and the anomalous enhanced degradation reduced accordingly. >

Temperature dependence of the channel hot-carrier degradation of n-channel MOSFET's

The generation of fast interface traps due to channel hot-carrier injection in n-channel MOS transistors is investigated as a function of stress temperature. The relative importance of the mechanisms for the generation of fast interface traps by hot electrons and hot holes is shown to be independent of the temperature. In all cases the generation of fast interface traps is slightly reduced at lower temperatures. The degradation of transistor I/sub d/-V/sub g/ characteristics, on the other hand, is strongly enhanced at lower temperatures. This is explained by a previously suggested model on the temperature dependence of the influence of the local narrow potential barrier, induced at the drain junction as a result of degradation, on the reverse-mode current characteristics. It is shown that only a minor part of the large current reduction at low temperatures can be ascribed to enhanced electron trapping. >

Hot-carrier degradation in submicrometre MOSFETs: from uniform injection towards the real operating conditions

An overview is given of the present understanding of the hot carrier degradation problem in submicrometre MOSFETs. First we discuss the degradation mechanisms observed under, for circuit operation, somewhat artificial but well-controlled uniform-substrate hot electron and substrate hot hole injection conditions. Then the more realistic case of static channel hot carrier degradation is treated, and some important process-related effects are illustrated, followed by the behaviour under the most relevant case for real operation, namely dynamic degradation. Finally, the strategies for improving hot carrier reliability and a forecast of the hot carrier reliability problem for sub-0.25 mu m technologies are briefly discussed.

Observation of single interface traps in submicron MOSFET's by charge pumping

The observation of single interface traps in small area MOSFETs by charge pumping is demonstrated for the first time, The dependence of the single trap charge pumping current on the base level voltage is described, Also the creation of one single interface trap under influence of low level hot carrier injection is demonstrated. A prediction of the charge pumping current behavior as a function of rise and fall time and temperature for the case of individual traps is made. The correlation with RTS-noise experiments is discussed.

On the field dependence of intrinsic and extrinsic time-dependent dielectric breakdown

In this study the field acceleration of intrinsic and extrinsic breakdown is studied. For the intrinsic mode an exp(1/E)-acceleration law is found, while for the extrinsic mode an new exp(E)-acceleration law for Q/sub BD/ is proposed. This field acceleration model is implemented in a maximum likelihood algorithm together with a new analytical expression for fitting competing Weibull distributions. With this algorithm an extensive t/sub BD/-data set measured at different stress conditions can be fitted excellently in one single calculation. From the result, predictions of low-field oxide reliability are made and the screening conditions in order to guarantee a pre-set reliability specification are calculated.

On the hot-carrier-induced post-stress interface trap generation in n-channel MOS transistors

A continued fast interface trap generation is observed in n-channel MOS transistors after termination of the hot-carrier stress. The magnitude of this post-stress effect is strongly dependent on the conditions of the preceding stress, on the post-stress conditions and on the process parameters. For measurements at 293 K, a simple model is proposed which is based on the release of hydrogen by the thermal detrapping of holes, and which can explain the observed dependencies. The importance of the post-stress D/sub it/-generation is illustrated for the case of dynamic stress conditions where it can lead to an apparently deviating degradation behavior. >