Robert M. Geffken

The evolution of interconnection technology at IBM

Advances in interconnection technology have played a key role in allowing continued improvements in integrated circuit density, performance, and cost. ibm contributions to interconnection technology over approximately the last ten generations of semiconductor products are reviewed. the development of a planar, back-end-of-line (beol) technology, used in ibm dram, bipolar, and cmos logic products since 1988, has led to a threefold increase in the number of wiring levels, aggressive wiring pitches at all interconnection levels, and high-leverage design options such as stacked contacts and vias. possible future beol technologies are also discussed, with emphasis on the use of higher-conductivity wiring and lower-dielectric-constant insulators. it is expected that their use will result in higher performance and reliability. applications include future, lower-power devices as well as more cost-effective, higher-performance versions of present-day designs.

Multi-level metallurgy for master image structured logic

A dense double-level metal interconnection process has been developed for application to master image structured logic products. The metal wiring pitches that are currently being produced, 5.0-µm metal 1 and 7.0-µm metal 2, are compatible with 2.0-µm lithography at other mask levels. These densities are achieved by use of a nitride-polyimide dual insulation scheme and second metal lift-off to achieve a unique overlapping via structure and elimination of metal borders. Details and rationale for the choice of the insulator/via etch scheme and second metal definition process are discussed. Finally, the influence of various topographical effects are also considered.