S. Bruyere

Review on high-k dielectrics reliability issues

High-k gate dielectrics, particularly Hf-based materials, are likely to be implemented in CMOS advanced technologies. One of the important challenges in integrating these materials is to achieve lifetimes equal or better than their SiO/sub 2/ counterparts. In this paper we review the status of reliability studies of high-k gate dielectrics and try to illustrate it with experimental results. High-k materials show novel reliability phenomena related to the asymmetric gate band structure and the presence of fast and reversible charge. Reliability of high-k structures is influenced both by the interfacial layer as well as the high-k layer. One of the main issues is to understand these new mechanisms in order to asses the lifetime accurately and reduce them.

Evidence for hydrogen-related defects during NBTl stress in p-MOSFETs

This work gives an insight into the degradation mechanisms during a negative bias instability stress on ultrathin oxides (t/sub ox/=20 /spl Aring/). The generation of interface traps and oxide defects is shown to impact parameters such as the threshold voltage. Their generation is linked to the release of hydrogen species at the interface according to the hydrogen release model. Only hot holes can be trapped by the anode hole injection phenomenon.

MIM capacitance variation under electrical stress

Abstract Due to strong requirement in term of capacitance voltage linearity, MIM capacitance stability during the whole operating lifetime of the product appears to be a key issue to warrant the reliability of this device. Using a constant current stress, two effects can be noticed on the evolution of the stressed C–V characteristics: a voltage shift to negative bias and a significant increase of the capacitance. Both phenomena have been demonstrated to be strongly correlated and to have the same origin: the trapped charges in oxide, which can generate new dipoles in the dielectric and, as a result, modulate the dielectric permittivity.

Quasi-breakdown in ultra-thin SiO/sub 2/ films: occurrence characterization and reliability assessment methodology

This paper discusses different statistical approaches for the quasi-breakdown phenomenon. In particular, a novel methodology based on the idea that breakdown and quasi-breakdown are competing mechanisms and that they have to be separately analyzed, is developed and well validated for oxide thickness ranging from 3.5 down to 2.5 nm. This methodology is demonstrated to well explain all the quasi-breakdown rate variations with temperature, voltage, area and oxide thickness. Moreover, this new approach enables to rigorously determine the quasi-breakdown acceleration factor with temperature and electric field, which have been found to be different from the breakdown ones. As a result, and confirmed by the difference observed between the obtained time to breakdown and time to quasi-breakdown spreads, the defects at the origin of both phenomena have to be different. Finally, a reliability assessment methodology is presented enabling a proper analysis of both phenomena for reliability evaluation and lifetime prediction.

Dielectric reliability in deep-submicron technologies: From thin to ultrathin oxides

Abstract This paper focuses on the dielectric reliability in the thin and ultrathin oxide regime. The wear-out mechanisms and the breakdown phenomena related to the Si SiO 2 system are considered within the 12nm-5nm oxide thickness range. The degeneration evolution with respect to the oxide thickness and the consequences of the mechanisms involved in the various failure modes which limit the dielectric reliability are discussed.

Emerging oxide degradation mechanisms: stress induced leakage current (SILC) and quasi-breakdown (QB)

Abstract The reliability of thin oxides is a primary concern for the qualification of advanced CMOS, DRAMS and non volatile memory technologies. With the scaling down process the thickness of active dielectrics in CMOS, DRAMs and memory devices has steadily been reduced during the past years. The reduction of the oxide thickness has given rise to the onset of new phenomena for the viewpoint of reliability such as stress induced leakage current (SILC) and quasi-breakdown (QB). This paper intends to present a brief review of these emerging degradation processes which affect the reliability of ultra-thin oxides. The main characteristics and the physics underlying the SILC and QB will be discussed and illustrated with recent experimental results obtained on advanced technologies featuring thin gate dielectrics.

Three-dimensional 35 nF/mm/sup 2/ MIM capacitors integrated in BiCMOS technology

Decoupling applications require high capacitance values. To optimize the chip performances, it appears particularly interesting to integrate them directly in interconnect levels, especially in BiCMOS technology. In order to reach this goal and minimize the area occupied by such devices, three-dimensional MiM capacitors have been introduced with different dielectrics: Ta/sub 2/O/sub 5/ deposited by MOCVD and A1/sub 2/O/sub 3/ by ALD. Thus, high capacitance density of 35nF/mm/sup 2/ has been reached. Through comparison between planar and three dimensional (3D) MIM capacitor characterization, it has been demonstrated that 3D MIM capacitor, named high density trench capacitor (HiDTC), architecture is a very promising candidate to integrate such high capacitance values.

Current Instability, Permittivity Variation With Frequency, and Their Relationship in

In this paper, Ta2O5 current instability in MIM and MIS capacitors is studied over several sample thicknesses with a current-versus-time measurement and low-frequency dielectric spectroscopy. Three types of phenomena are identified. The first one is attributed to polarization current correlated to flat loss behavior. The second mechanism corresponds to the conduction current identified as a steady state: a unique mechanism, probably a Poole-Frenkel one, is observed on the whole investigated voltage range. Finally, a resistance degradation phenomenon occurs that has been attributed to ionic diffusion in dielectric and follows the space-charge-limited theory. According to physical characterization, a model based on oxygen vacancies migration in the dielectric is suggested. Moreover, according to low-frequency dielectric spectroscopy measurements, it has been identified that the low-frequency loss peak is created by the same defects and is well modeled by the Maxwell-Wagner approach.

\hbox{Ta}_{2}\hbox{O}_{5}

Abstract In this work we report an experimental observation of the current dependence on the defect generation probability driving to breakdown. We propose the MVHR model (multi-vibrational hydrogen release) based on the multi-vibrational excitation of the Si–H bond stretching mode. By this way we explain the power-law dependence of charge and time to breakdown and highlight its limit on PMOS inversion.

Capacitor

Current instability in metal-oxide-semiconductor and metal-insulator-metal (MIM) capacitors has been previously reported to be a potential reliability issue. This letter intends to study a particular way to reduce these current instabilities with time in high-κ MIM capacitors. It consists in the introduction of a stable dielectric layer between the high-κ dielectric and the electrodes in order to prevent oxygen vacancy formation at interfaces. When applied to Ta2O5 capacitors, the deposition of a thin layer of Al2O3 in the range of a few tens of angstroms enables the strong reduction of current instabilities while maintaining good electrical performances.