Scot E. Swanson

Novel self-stressing test structures for realistic high-frequency reliability characterization

A series of self-stressing test structures suitable for investigation of reliability failure mechanisms (hot carriers, electromigration, oxide breakdown) under realistic integrated circuit operating conditions, is described. These structures contain DC-controlled, high-frequency on-chip oscillators, which stress test structures. As a result, high-frequency (>200-MHz) stress-testing can be performed using less expensive DC test systems. In particular, hot-carrier stress-testing was performed at frequencies up to 230 MHz, which is the highest stress frequency reported for inverters. For the 1- mu m technology examined, the quasi-static model accurately describes the degradation. The statistical variation in high-frequency, hot-carrier-induced degradation is presented, and variations with temperature are shown to be consistent with DC stress results. Since only DC test systems are needed, these structures provide a simple method to calibrate reliability simulators and characterize high-frequency reliability effects.<<ETX>>

Non-destructive resonant frequency measurement on MEMS actuators

Resonant frequency measurements provide useful insight into the repeatability of microelectromechanical systems (MEMS) manufacturing processes. Several techniques are available for making this measurement. All of these techniques however, tend to be destructive to devices which experience sliding friction, since they require the device to be operated at resonance. A nondestructive technique is presented which does not require the device to be continually driven at resonance. This technique was demonstrated on a variety of MEMS actuators.

The Contribution of Low-Energy Protons to the Total On-Orbit SEU Rate

Low- and high-energy proton experimental data and error rate predictions are presented for many bulk Si and SOI circuits from the 20-90 nm technology nodes to quantify how much low-energy protons (LEPs) can contribute to the total on-orbit single-event upset (SEU) rate. Every effort was made to predict LEP error rates that are conservatively high; even secondary protons generated in the spacecraft shielding have been included in the analysis. Across all the environments and circuits investigated, and when operating within 10% of the nominal operating voltage, LEPs were found to increase the total SEU rate to up to 4.3 times as high as it would have been in the absence of LEPs. Therefore, the best approach to account for LEP effects may be to calculate the total error rate from high-energy protons and heavy ions, and then multiply it by a safety margin of 5. If that error rate can be tolerated then our findings suggest that it is justified to waive LEP tests in certain situations. Trends were observed in the LEP angular responses of the circuits tested. Grazing angles were the worst case for the SOI circuits, whereas the worst-case angle was at or near normal incidence for the bulk circuits.

Hardness Assurance for Proton Direct Ionization-Induced SEEs Using a High-Energy Proton Beam

The low-energy proton energy spectra of all shielded space environments have the same shape. This shape is easily reproduced in the laboratory by degrading a high-energy proton beam, producing a high-fidelity test environment. We use this test environment to dramatically simplify rate prediction for proton direct ionization effects, allowing the work to be done at high-energy proton facilities, on encapsulated parts, without knowledge of the IC design, and with little or no computer simulations required. Proton direct ionization (PDI) is predicted to significantly contribute to the total error rate under the conditions investigated. Scaling effects are discussed using data from 65-nm, 45-nm, and 32-nm SOI SRAMs. These data also show that grazing-angle protons will dominate the PDI-induced error rate due to their higher effective LET, so PDI hardness assurance methods must account for angular effects to be conservative. We show that this angular dependence can be exploited to quickly assess whether an IC is susceptible to PDI.

Wafer-level pulsed-DC electromigration response at very high frequencies

DC and pulsed-DC electromigration tests were performed at the wafer level using standard and self-stressing test structures. DC characterization tests over a very large temperature range (180 to 560/spl deg/C) were consistent with an interface diffusion mechanism in parallel with lattice diffusion. That data allowed for extraction of the respective activation energies and the diffusion coefficient of the rapid mechanism. The ability to extract simultaneously a defect-based diffusion coefficient and activation energy is significant given the extreme difficulty in making those measurements in aluminum. The pulsed-DC experiments were conducted over a range that includes the highest frequency to date, from DC to 500 MHz. Measurements were also made as a function of duty factor from 15% to 100% at selected frequencies. The data shows that the pulsed-DC lifetime is consistent with the average current density model at high (> 10 MHz) frequencies and showed no additional effects at the highest frequency tested (500 MHz). At low frequencies, we attribute the lessened enhancement to thermal effects rather than vacancy relaxation effects. Finally, the deviation in lifetime from the expected current density dependence, characterized over 1 1/2 orders of magnitude in current density, is explained in terms of a shift in the boundary condition for electromigration as the current density is decreased.<<ETX>>

Direct Comparison of Charge Collection in SOI Devices From Single-Photon and Two-Photon Laser Testing Techniques

The amounts of charge collection by single-photon absorption (SPA) and by two-photon absorption (TPA) laser testing techniques have been directly compared using specially made SOI diodes. For SPA measurements and some TPA measurements, the back substrates of the diodes were removed by etching with XeF2. With the back substrates removed, the amount of TPA induced charge collection can be correlated to the amount of SPA induced charge collection. There are significant differences, however, in the amount of TPA induced charge collection for diodes with and without substrates. For the SOI diodes of this study, this difference appears to arise from several contributions, including nonlinear-optical losses and distortions that occur as the pulse propagates through the substrate, as well as displacement currents that occur only when the back substrate is present. These results illustrate the complexity of interpreting TPA and SPA single-event upset measurements.

Pin-joint design effect on the reliability of a polysilicon microengine

Accelerated stress experiments were performed on a class of pin joints to determine reliability. We varied parameters that affected the area of the rubbing surfaces and the gap between those surfaces. Most of the pin joints failed due to seizure. We observed bimodal failure distributions where the lower distribution was associated with an adhesion event with no observable wear debris. The upper distribution of failures was associated with agglomerations of wear debris, which may have seized the pin joint. The effect of surface coatings was also studied. We found that for supercritical carbon dioxide (SCCO/sub 2/) dried microengines; the largest effect was due to gap spacing. For microengines with a self-assembled monolayer coating (SAMS), we observed minimal difference in the lifetimes of failed devices.

Hardness Assurance Testing for Proton Direct Ionization Effects

The potential for using the degraded beam of high-energy proton radiation sources for proton hardness assurance testing for ICs that are sensitive to proton direct ionization effects are explored. SRAMs were irradiated using high energy proton radiation sources (~67-70 MeV). The proton energy was degraded using plastic or Al degraders. Peaks in the SEU cross section due to direct ionization were observed. To best observe proton direct ionization effects, one needs to maximize the number of protons in the energy spectrum below the proton energy SEU threshold. SRIM simulations show that there is a tradeoff between increasing the fraction of protons in the energy spectrum with low energies by decreasing the peak energy and the reduction in the total number of protons as protons are stopped in the device as the proton energy is decreased. Two possible methods for increasing the number of low energy protons is to decrease the primary proton energy to reduce the amount of energy straggle and to place the degrader close to the DUT to minimize angular dispersion. These results suggest that high-energy proton radiation sources may be useful for identifying devices sensitive to proton direct ionization.

Comparison of Single and Two-Photon Absorption for Laser Characterization of Single-Event Upsets in SOI SRAMs

The laser pulse energy thresholds for single-event upset measured by single photon and two photon absorption are measured and compared for Sandia SRAMs and DPSRAMs, and IBM 45-nm SRAMs for devices with and without the back substrate removed. These results are also compared to heavy-ion results taken on the same devices. Sandia SRAM data taken on different test dates resulted in considerably different TPA laser pulse energy thresholds even though the TPA system was calibrated using standard techniques each test date. These differences are believed to be due to changes in laser spot size. This shows that it is imperative to develop a calibration procedure that monitors all relevant laser parameters if TPA is to be used as a routine quantitative tool. Removing the back substrate makes a very large difference in TPA laser pulse energy threshold. This large difference is likely due to either displacement currents generated in the back substrate by TPA and/or nonlinear optical effects which can reduce the laser pulse irradiance in the active region. Nevertheless, the mechanism does not appear to affect the qualitative nature of TPA measurements. Both SPA and TPA laser measurements were used to estimate the heavy-ion threshold LETs of the Sandia DPSRAMs and 45-nm IBM SRAMs. Both SPA and TPA overestimated the heavy-ion threshold LET of the IBM 45-nm SRAMs (likely due to the large laser spot size compared to the size of the SRAM cell), but reasonably estimated the threshold LETs of the Sandia DPSRAMs. For the first time, TPA laser pulse energy (squared) is directly compared to SPA laser pulse energy at threshold. There is reasonable quantitative agreement between the charge required to induce upsets by TPA and SPA with the back substrate removed.

Complete method for E/sub bd/ correction by series resistance characterization

We have developed a semi-automated method for determining the series resistance profiles of dot capacitors and for obtaining corrected oxide fields at breakdown. This method is based upon a least-squares-fit of IV data, obtained from a voltage-ramp test, to the Fowler-Nordheim leakage model. The profiles provide insight into the general characteristics of series resistance. Certain features of the profiles can be associated with charge trapping and the onset of oxide breakdown.