Shahriar Mirabbasi

Design and Optimization of Resonance-Based Efficient Wireless Power Delivery Systems for Biomedical Implants

Resonance-based wireless power delivery is an efficient technique to transfer power over a relatively long distance. This technique typically uses four coils as opposed to two coils used in conventional inductive links. In the four-coil system, the adverse effects of a low coupling coefficient between primary and secondary coils are compensated by using high-quality (Q) factor coils, and the efficiency of the system is improved. Unlike its two-coil counterpart, the efficiency profile of the power transfer is not a monotonically decreasing function of the operating distance and is less sensitive to changes in the distance between the primary and secondary coils. A four-coil energy transfer system can be optimized to provide maximum efficiency at a given operating distance. We have analyzed the four-coil energy transfer systems and outlined the effect of design parameters on power-transfer efficiency. Design steps to obtain the efficient power-transfer system are presented and a design example is provided. A proof-of-concept prototype system is implemented and confirms the validity of the proposed analysis and design techniques. In the prototype system, for a power-link frequency of 700 kHz and a coil distance range of 10 to 20 mm, using a 22-mm diameter implantable coil resonance-based system shows a power-transfer efficiency of more than 80% with an enhanced operating range compared to ~40% efficiency achieved by a conventional two-coil system.

System-on-Chip: Reuse and Integration

Over the past ten years, as integrated circuits became increasingly more complex and expensive, the industry began to embrace new design and reuse methodologies that are collectively referred to as system-on-chip (SoC) design. In this paper, we focus on the reuse and integration issues encountered in this paradigm shift. The reusable components, called intellectual property (IP) blocks or cores, are typically synthesizable register-transfer level (RTL) designs (often called soft cores) or layout level designs (often called hard cores). The concept of reuse can be carried out at the block, platform, or chip levels, and involves making the IP sufficiently general, configurable, or programmable, for use in a wide range of applications. The IP integration issues include connecting the computational units to the communication medium, which is moving from ad hoc bus-based approaches toward structured network-on-chip (NoC) architectures. Design-for-test methodologies are also described, along with verification issues that must be addressed when integrating reusable components.

Wireless energy harvesting for the Internet of Things

The Internet of Things (IoT) is an emerging computing concept that describes a structure in which everyday physical objects, each provided with unique identifiers, are connected to the Internet without requiring human interaction. Long-term and self-sustainable operation are key components for realization of such a complex network, and entail energy-aware devices that are potentially capable of harvesting their required energy from ambient sources. Among different energy harvesting methods, such as vibration, light, and thermal energy extraction, wireless energy harvesting (WEH) has proven to be one of the most promising solutions by virtue of its simplicity, ease of implementation, and availability. In this article, we present an overview of enabling technologies for efficient WEH, analyze the lifetime of WEH-enabled IoT devices, and briefly study the future trends in the design of efficient WEH systems and research challenges that lie ahead.

Overlapped complex-modulated transmultiplexer filters with simplified design and superior stopbands

A simple method for the design of the finite-impulse-response prototype filter for maximally decimated overlapped complex-modulated transmultiplexers with near perfect reconstruction property is presented. The procedure is unified for all values of overlap factor and leads to a prototype filter with excellent frequency selectivity and fast sidelobe fall-off rate. The high stopband attenuation and fast sidelobe fall-off rate, which is justified analytically, make the proposed filters suitable candidates for high-speed data communication applications employing multicarrier modulation.

Measurement study and transmission for in-vehicle power line communication

In-vehicle power line communication (PLC) holds great promises as an enabler of in-vehicle communication without increasing weight, volume, or cost of the wiring harnesses. In this paper, we join a few recent works and present channel measurements for a specific compact car. We discuss and compare our measurement results with those obtained in previous campaigns. Furthermore, we evaluate our measurements from the viewpoint of high connectivity. That is, we are interested in the suitability of PLC for applications that require a reliable link from any node to any other node at any time. Perhaps not surprisingly, we find that advanced transmission techniques such as multihop or frequency diversity are necessary to achieve this goal.

A 3GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90nm CMOS with Integrated Output Filter

A 90nm buck converter is intended for complex multi-core ICs. Using the 3GHz system clock for switching reduces the area to 0.27mm2 and allows the output filter to be integrated. Efficiency is increased by recycling clock charge and delivering it to the load instead of ground. A dedicated 3GHz clock circuit driving 12pF consumes 39.9mW. In contrast, a combined clock and converter circuit consumes 56.2mW and delivers 25.7mW at the converter output. Regulation is achieved through PWM of the clock. The circuit converts 1.0V to between 0.5 to 0.7V at 40 to 100mA.

Resonance-based wireless power delivery for implantable devices

Due to the limited life time of batteries, biomédical implants typically use inductive coupling to transfer power to the implantable device. Inductive coupling of source and load coils suffers from low efficiency due to the low coupling between the coils. The low coupling limits the maximum transferable power and operating range of the system. Using a resonance-based coupling technique, the adverse effect of low coupling between source and load coils is in part compensated by the high quality factor of the coils. Unlike its two-coil counterpart, in the presented four-coil energy transfer system the efficiency profile of the power transfer is not a monotonically decreasing function of the distance between the coils and can be optimized to provide a maxima at a relatively large operating distance. Furthermore, as compared to conventional systems, resonance-based system show more than 2x efficiency improvement over an increased operating range.

A Fully Integrated 660 MHz Low-Swing Energy-Recycling DC–DC Converter

A fully integrated 0.18 mum DC-DC buck converter using a low-swing ldquostacked driverrdquo configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals.

Hierarchical QAM: a spectrally efficient dc-free modulation scheme

A new spectrally efficient, dc-free modulation scheme called hierarchical quadrature amplitude modulation is proposed. The use of HQAM in high-data-rate digital communication systems opens new possibilities for the practical realization of highly integrated receivers.

A 1.2-pJ/bit 16-Gb/s 60-GHz OOK Transmitter in 65-nm CMOS for Wireless Network-On-Chip

This paper presents a high-efficiency 60-GHz on-off keying (OOK) transmitter (TX) designed for wireless network-on-chip applications. Aiming at an intra-chip communication distance of 20 mm, the TX consists of a drive amplifier (DA), a high-speed OOK modulator, and a transformer-coupled voltage-controlled oscillator. For high efficiency, a common-source topology with a drain-to-gate neutralization technique is chosen for the DA. A detailed mathematical design methodology is derived for the neutralization technique. The bulk-driven OOK modulator employs a novel dual feedthrough cancellation technique, resulting in a 30-dB on-off ratio. Fabricated in a 65-nm bulk CMOS process, the TX consumes only 19 mW from a 1-V supply, and occupies an active area of 0.077 mm2. A maximum modulation data rate of 16 Gb/s with 0.75-dBm output power is demonstrated through measurements, which translates to a bit-energy efficiency of 1.2 pJ/bit.