Shi-Eun Kim

Robust multi-bit programmable flash memory using a resonant tunnel barrier

A novel multi-bit flash memory using a SiO2/a-Si/SiO 2 resonant tunnel barrier was fabricated for the first time. The SONOS-type memory with a resonant tunnel barrier is programmed only at preferential bias conditions determined by quantum tunneling conditions. By doing so, the dispersion of multi-level programmed threshold voltages, Vth, are drastically reduced, and highly reliable data storage is possible. Moreover, program/erase speed, data retention, endurance and read disturb characteristics were also shown to be better than that of a conventional SiO2 tunnel barrier

Active Width Modulation (AWM) for cost-effective and highly reliable PRAM

This paper presents, for the first time, the Active Width Modulation (AWM) technology which compensates a string resistance with the active widths of local Y selectors for the purpose of increasing the number of cells-per-string (CPS). The AWM is demonstrated using 58 nm 512 Mb PRAM with 32 CPS instead of 8 CPS [1], which can reduce the chip size by 4.3%. Also, the systematic variability of a program current, ΔIPGM, is reduced from 17.8% to 0.82%, and that of a write energy, ΔEPGM, from 47.9% to 2.0%. Both write endurance and disturbance of >1M cycles are achieved for 512 Mb PRAM. The AWM can be further applied to increase CPS to 64 or 128, together with the reduction of a reset current, IRESET, for sub-40 nm PRAM technology and so on.

Sub-6F2 Charge Trap Dynamic Random Access Memory Using a Novel Operation Scheme

For the first time, we have demonstrated the feasibility of charge trap-based devices with ultra-thin tunnel oxide for high density DRAM application. Experimental results using direct tunneling scheme show good memory characteristics such as long retention time (>1000sec), large memory window (>1V), non-destructive read, high endurance, and acceptable programming speed (~100ns). Further improvement for low operation voltage and sub-6F2 cell size can be achieved by adopting a novel hot electron injection method. This novel operation scheme is helpful for efficient programming and minimizing disturbance. Due to the simple and fully logic compatible process, charge trap DRAM is considered to be a good candidate for future high-density DRAM and SOC applications