Shinichi Yasuda

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.

Fully Integrated Graphene and Carbon Nanotube Interconnects for Gigahertz High-Speed CMOS Electronics

Carbon-based nanomaterials such as metallic single-walled carbon nanotubes, multiwalled carbon nanotubes (MWCNTs), and graphene have been considered as some of the most promising candidates for future interconnect technology because of their high current-carrying capacity and conductivity in the nanoscale, and immunity to electromigration, which has been a great challenge for scaling down the traditional copper interconnects. Therefore, studies on the performance and optimization of carbon-based interconnects working in a realistic operational environment are needed in order to advance the technology beyond the exploratory discovery phase. In this paper, we present the first demonstration of graphene interconnects monolithically integrated with industry-standard complementary metal-oxide-semiconductor technology, as well as the first experimental results that compare the performance of high-speed on-chip graphene and MWCNT interconnects. The graphene interconnects operate up to 1.3-GHz frequency, which is a speed that is commensurate with the fastest high-speed processor chips today. A low-swing signaling technique has been applied to improve the speed of carbon interconnects up to 30%.

Monolithic Integration of CMOS VLSI and Carbon Nanotubes for Hybrid Nanotechnology Applications

We integrate carbon nanotube (CNT) fabrication with standard commercial CMOS very large scale integration on a single substrate suitable for emerging hybrid nanotechnology applications. This cointegration combines the inherent advantages of CMOS and CNTs. These emerging applications include CNT optical, biological, chemical, and gas sensors that require complex CMOS electronics for sensor control, calibration, and signal processing. We demonstrate the successful cointegration on a single chip with a vehicle circuit, a two-transistor cascode megahertz amplifier utilizing both silicon n-channel MOSFET and CNT transistors with a total power consumption of 62.5 muW.

1200μm 2 Physical Random-Number Generators Based on SiN MOSFET for Secure Smart-Card Application

In this work, because of the high-amplitude random noise at high frequency from the SiN MOSFET, we need only a single amplifier and A/D converter, and the amplifier area is decreased.

Physical random number generator based on MOS structure after soft breakdown

We present a novel physical random number generator (RNG) that uses a metal-oxide semiconductor (MOS) capacitor after soft breakdown (SBD) as a random source. It is known that the electrical properties of MOS capacitors after SBD show large fluctuation. When the resistor in an astable multivibrator is replaced with an MOS capacitor after SBD, the multivibrator converts the noise signal into a rectangular wave whose period fluctuates randomly. A 1-bit counter and a flip-flop are used to generate random numbers from the fluctuating rectangular wave. Some high-level tests indicate that the generated random numbers have excellent quality for cryptographic applications. Even though our circuit is small and can be constructed using about 20 complementary-MOS logic gates and several passive devices, high-quality random numbers such as those generated by large physical RNGs can be obtained.

Measurement of Subnanosecond Delay Through Multiwall Carbon-Nanotube Local Interconnects in a CMOS Integrated Circuit

Due to their excellent electrical properties and small size, metallic carbon nanotubes (CNTs) are promising materials for interconnect wires in future integrated circuits. Indeed, simulations have firmly established CNTs as strong contenders for replacing or complementing copper interconnects. In this paper, we analyze the performances of a prototype 0.25-mum CMOS digital integrated circuit with select horizontal multiwall CNT (MWCNT) interconnects. Some local interconnect wires of the prototype chip were implemented, during a post-CMOS assembly process, by single 14-mum -long metallic MWCNT with 30-nm diameter, representative of future requirements for local interconnects. We evaluate the merits and challenges of MWCNT interconnects in a realistic silicon integrated-circuit environment. We experimentally extract the subnanosecond delays of these wires to quantitatively benchmark their future potential for the first time. Furthermore, we compare our experimental results with an existing MWCNT interconnect model, as well as with the expected performances of scaled copper wires. Finally, we discuss the origin of the discrepancies between our experimental results and the modeling projections.

Monolithic integration of CMOS VLSI and CNT for hybrid nanotechnology applications

We integrate carbon nanotube (CNT) fabrication with commercial CMOS VLSI fabrication on a single substrate suitable for emerging hybrid nanotechnology applications. This co-integration combines the inherent advantages of CMOS and CNTs. These emerging applications include CNT optical, biological, chemical, and gas sensors that require complex CMOS electronics for sensor control, calibration, and signal processing of sensor output. We demonstrate the successful co-integration on a single chip with a vehicle circuit; a two transistor cascode megahertz amplifier utilizing both silicon nMOS and CNT transistors.

High-speed graphene interconnects monolithically integrated with CMOS ring oscillators operating at 1.3GHz

We have successfully experimentally integrated graphene interconnects with commercial 0.25µm technology CMOS ring oscillator circuit using conventional fabrication techniques, and demonstrated high speed on-chip graphene interconnects that operates above 1GHz.

Si nanodevices for random number generating circuits for cryptographic security

Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.

Compact Fault Recovering Flip-Flop with Adjusting Clock Timing Triggered by Error Detection

We propose novel compact fault recovering flip-flops (CFR-FFs) which can recover timing error and soft error caused by process variation, supply voltage fluctuation, attacking high energy particle, and so on. Those FFs are composed of an error detector and a clock controller, which re-raises a clock to latch correct data upon error detecting. We propose two kinds of CFR-FFs. One is that the clock rises every cycle, and the other is that the clock rises only when data has changed. These FFs were fabricated by a 0.25 mum CMOS process. Error rates were measured by applying a noise signal to the supply voltage. While the error rate was over 46 % for a conventional FF, it was 1.4 % and 2.2 % for each CFR-FF with only 1.41 and 1.65 times area overhead, respectively.