Shunichi Watabe

Large-Scale Test Circuits for High-Speed and Highly Accurate Evaluation of Variability and Noise in Metal--Oxide--Semiconductor Field-Effect Transistor Electrical Characteristics

To develop a new process technology for suppressing the variability and noise in metal–oxide–semiconductor field-effect transistors (MOSFETs) for large-scale integrated circuits, accurate and rapid measurement test circuits for the evaluation of a large number of MOSFET electrical characteristics were developed. These test circuits contain current-to-voltage conversion circuits and simple scanning circuits in order to achieve rapid and accurate evaluation for a wide range of measurement currents. The test circuits were fabricated and the variabilities and noises in drain–source current, gate leakage current, and p–n junction leakage current were evaluated using a large-scale test circuit.

Experimental Investigation of Effect of Channel Doping Concentration on Random Telegraph Signal Noise

Random telegraph signal (RTS) noise has become one of the most important problems in the continuous scaling down of field-effect transistors (FETs). In this study, we investigate experimentally the relationship between RTS amplitude and channel doping concentration (NA), which is a key parameter related to threshold voltage adjustment and short-channel effects, in 393,216 n-type FETs by a high-speed measurement method. We demonstrate that NA has a significant effect on RTS amplitude even at approximately the same interface and bulk trap densities of the gate insulator films, which are evaluated by the charge pumping method, by the quasi-static capacitance–voltage method, and on the basis of 1/f noise characteristics. An increase in RTS amplitude may arise from a more advanced channel nonuniformity as NA increases.

Anomalous Random Telegraph Signal Extractions from a Very Large Number of n-Metal Oxide Semiconductor Field-Effect Transistors Using Test Element Groups with 0.47 Hz–3.0 MHz Sampling Frequency

Random telegraph signal (RTS) noise in small gate area metal oxide semiconductor (MOS) transistors occurs frequently and causes serious problems in the field of flash memories and complementary MOS (CMOS) image sensors. The trap in the gate insulator, which is considered the origin of RTS, varies widely in terms of spatial location and energy level, so that RTS characteristics including the amplitude and time constants have large variability by nature and statistical analysis of RTS should become indispensable. In this paper, we propose a high-speed RTS measurement system with a newly developed test circuit and discuss the drain current and temperature dependences of RTS amplitude distributions. Moreover, we expand the sampling frequency between 0.47 Hz–3.0 MHz and the observation length up to about 4 h and can thereby observe some anomalous RTSs such as ones with long time constants, ones generated abruptly, and ones disappearing.

Analysis of Hundreds of Time Constant Ratios and Amplitudes of Random Telegraph Signal with Very Large Scale Array Test Pattern

Random telegraph signal (RTS) noise shows discrete and stochastic switching in two or more states at a drain current or threshold voltage. The capture and emission of carriers in individual traps near a silicon–gate insulator film interface induce RTS noise phenomena. RTS noise has become a crucial problem in analog devices and other devices. To suppress RTS noise, it is necessary to determine the energy level of traps. Time constant ratio has a strong relationship with the energy level of traps in gate insulator films. In this paper, we extract a large number of RTS data sets with large-scale array test patterns and evaluate the gate-bias voltage dependences of time constant ratio and amplitude. We demonstrate that the energy level of traps distributes uniformly at a drain current of at least 0.1–1.0 µA.

Asymmetry of RTS characteristics along source-drain direction and statistical analysis of process-induced RTS

In this work, we investigated random telegraph signal (RTS) amplitude and the probability of trap empty along two different drain current directions for various gate lengths using novel test structures which enable to measure RTS in large numbers. Asymmetry of RTS amplitude along source-drain current direction increases as gate length shortens because a trap near the gate edge dominates RTS phenomenon as gate length shortens. The probability of trap empty shows weak positive correlation between both directions but asymmetric difference of that partially remains. We also investigated RTS characteristics dependence on kinds of gate insulator films and plasma damages of back-end-of-line (BEOL). Silicon oxynitride gate insulator film has bad effect on RTS and plasma damage does not appear as the increase of RTS amplitude up to 51,385 of antenna ratio.

Statistical Evaluation of Process Damage Using an Arrayed Test Pattern in a Large Number of MOSFETs

Evaluating the statistical variations of MOSFETs is important for realizing accurate analog circuits and large-scale-integration devices. A new evaluation method for the statistical variation of the electrical characteristics of MOSFETs is presented. We have developed a test circuit for understanding the statistical and local variations of MOSFETs in a very short time. We demonstrate that the electrical characteristics in more than one million MOSFETs, such as the threshold voltage and the subthreshold swing (S-Factor), are measured in 30 min and that the measured results are very efficient in developing the fabrication process, the process equipment, and the device structure to reduce the statistical and local characteristic variation.

Stress-induced leakage current and random telegraph signal

Stress-induced leakage current (SILC) and random telegraph signal (RTS) in n-type metal-oxide-semiconductor field-effect-transistor (n-MOSFETs) caused by the Fowler-Nordheim tunneling stress are studied by using the author’s newly developed test pattern. MOSFETs having large RTS increase can be induced by electrical stress in parallel with the inducing of SILC. Generation and recovery characteristics of SILC and RTS against the stress time and measurement temperature are very similar. However, the MOSFETs having large RTS are not related to ones having large anomalous SILC in this study. We consider that the traps that cause the RTS and anomalous SILC are the same, but their locations in SiO2 are different.

A Simple Test Structure for Evaluating the Variability in Key Characteristics of a Large Number of MOSFETs

The increase in the electrical characteristic variability of MOSFETs caused by the miniaturization of MOSFETs is one of the critical issues for realizing the low power consumption of large-scale-integrated circuits and the high accuracy of analog devices. It is necessary to easily evaluate the variability of a very large number of MOSFETs in a very short time for short-period-developing fabrication processes and device structures. We have proposed and developed a simple test structure for evaluating the electrical characteristics of over 1.2 million MOSFETs such as threshold voltage (Vth), subthreshold swing (S-factor) in around 30 min. The accuracy of the test circuit developed is 1.9 mV, as 3σ. We have also evaluated the Vth distribution, the S-factor distribution, and the dependence of Vth variability on the gate size and antenna ratio of MOSFETs. The measurement results are very useful in developing fabrication processes, process equipment, and device structures, that suppress the variability.

A test structure for statistical evaluation of pn junction leakage current based on CMOS image sensor technology

We propose a test structure to enable us to evaluate statistical distributions of small pn junction leakage currents of numerous samples in a very short time (0.1 – 10 fA, 28,672 n+/p diodes in 0.77s). This test structure is based on a CMOS active pixel image sensor, which contains a current-to-voltage conversion function by a capacitor and amplifiers of voltage signals in each pixel. The test structure can be designed easily because of a small number of mask layer requirements (at least one metal layer). Its simplicity has considerable benefits such as an easy fabrication for various processes without exceptional cares and also produces usefulness of statistical evaluation for anomalous pn junction leakage phenomena such as extremely large currents or dynamic and quantum fluctuations which show more and more as the device dimension shrinks.

Statistical Analysis of RTS Noise and Low Frequency Noise in 1M MOSFETs Using an Advanced TEG

In this paper, we developed an advanced Test Element Group (TEG) which can measure Random Telegraph Signal (RTS) noise in over 106 nMOSFETs including various gate sizes with high accuracy in a very short time. We measured and analyzed these noises statistically, as the result, we confirmed that appearance probabilities in the TEG and noise intensities of RTS are dependent on gate sizes.