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Dive into the research topics where Shwang-Ming Jeng is active.

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Featured researches published by Shwang-Ming Jeng.


Journal of The Electrochemical Society | 2001

Physical and Electrical Characteristics of F- and C-Doped Low Dielectric Constant Chemical Vapor Deposited Oxides

Zhen-Cheng Wu; Zhi-Wen Shiung; Chiu-Chih Chiang; Wei-Hao Wu; Mao-Chieh Chen; Shwang-Ming Jeng; Weng Chang; Pei-Fen Chou; Syun-Ming Jang; Chen-Hua Yu; Mong-Song Liang

This work compares the physical and electrical properties of two species of inorganie low dielectric constant (low-k) chemical vapor deposited (CVD) oxides, F-doped fluorinated silicate glass (FSG, k = 3.5) and C-doped organosilicate glass (OSG, k - 2.9), Experimental results indicate that FSG has a higher thermal stability (>600°C) than OSG (500°C), based on the results of thermal annealing for 30 min in an N 2 ambient. The degradation of the low-k property in OSG is mainly due to the thermal decomposition of methyl (-CH 3 ) groups at temperatures above 500°C. For the Cu gated oxide-sandwiched low-k dielectric metal-insulator-semiconductor (MIS) capacitors. Cu penetration was observed in both FSG and OSG after the MIS capacitors were bias-lemperature stressed at 250 and 150°C, respectively, with an effective applied field of 0.8 MV/cm. Specifically, Cu appeared to drift more readily in OSG than in FSG, presumably because OSG has a more porous and less dense structure than FSG. The Cu permeation can he impeded by a thin nitride (SiN) harrier layer.


Journal of The Electrochemical Society | 2001

Physical and Electrical Characteristics of Methylsilane- and Trimethylsilane-Doped Low Dielectric Constant Chemical Vapor Deposited Oxides

Zhen-Cheng Wu; Zhi-Wen Shiung; Chiu-Chih Chiang; Wei-Hao Wu; Mao-Chieh Chen; Shwang-Ming Jeng; Weng Chang; Pei-Fen Chou; Syun-Ming Jang; Chen-Hua Yu; Mong-Song Liang

This work investigates the physical and electrical properties of two species of inorganic C-doped low dielectric constant (low-k) chemical vapor deposited (CVD) organosilicate glasses (OSGs, α-SiCO:H). They are both deposited by plasma-enhanced CVD (PECVD) processes using methylsilane [(CH 3 )SiH 3 , 1 MS]- and trimethylsilane [(CH 3 ) 3 SiH, 3 MS]-based gases as the reagents. and are designated as OSGI and OSG2, respectively, Experimental results indicate that the thermal stability temperature of OSG1 is 500°C, while that of OSG2 is 600°C, based on the results of thermal annealing for 30 min in an N 2 ambient. The deterioration of the low-k property in OSG1 is predominately duc to the thermal decomposition at temperatures above 500°C of methyl (-CH 3 ) groups, which are introduced to lower the density and polarizability of OSGs. For the Cu-gated oxide-sandwiched low-k dielectric metal-insulator-semiconductor (MIS) capacitors, Cu permeation was observed in both OSG1 and OSG2 after the MIS eapacitors were bias-temperature stressed at 150°C with an effective applied field of 0.8 MV/cm. Moreover, Cu appeared to drift more readily in OSGI than in OSG2. presumably hecause OSGI has a more porous and less cross-linked structure than OSG2. The Cu penetration can he mitigated by a thin nitride dielectric barrier.


IEEE Electron Device Letters | 2001

Leakage mechanism in Cu damascene structure with methylsilane-doped low-K CVD oxide as intermetal dielectric

Zhen-Cheng Wu; Chiu-Chih Chiang; Wei-Hao Wu; Mao-Chieh Chen; Shwang-Ming Jeng; Lain-Jong Li; Syun-Ming Jang; Chen-Hua Yu; Mong-Song Liang

This letter investigates the leakage mechanism in the Cu damascene structure with methylsilane-doped low-k CVD organosilicate glass (OSG) as the intermetal dielectric (IMD). The leakage between Cu lines was found to be dominated by the Frenkel-Poole (F-P) emission in OSG for the structure using a 50-nm SiC etching stop layer (ESL). In the structure using a 50-nm SiN ESL, the leakage component through SiN also made a considerable contribution to the total leakage in addition to the bulk leakage from trapped electrons in OSG. An appropriate ESL of sufficient thickness is essential to reduce the leakage for application to a Cu damascene integration scheme.This letter investigates the leakage mechanism in the Cu damascene structure with methylsilane-doped low-k CVD organosilicate glass (OSG) as the intermetal dielectric (IMD). The leakage between Cu lines was found to be dominated by the Frenkel-Poole (F-P) emission in OSG for the structure using a 50-nm SiC etching stop layer (ESL). In the structure using a 50-nm SiN ESL, the leakage component through SiN also made a considerable contribution to the total leakage in addition to the bulk leakage from trapped electrons in OSG. An appropriate ESL of sufficient thickness is essential to reduce the leakage for application to a Cu damascene integration scheme.


international symposium on vlsi technology, systems, and applications | 2006

Integration of Cu Damascene with Pore-sealed PECVD Porogen Low-k (k=2.5) Dielectrics for 65nm Generation

M.l. Yeh; C.c. Chou; Tien-I Bao; Keng-Chu Lin; I.i. Chen; K.p. Huang; Z.c. Wu; Shwang-Ming Jeng; Chung-Yi Yu; Mong-Song Liang

Owing to the k extendability of porogen LK formed with the incorporation and removal of organic porogen precursors, the porogen LK is the competitive candidate for inter-metal dielectrics (IMDs) of 65nm generation and beyond. However, its porosity raises major challenges in the Cu/LK integration. Chemical and metal penetrability of the porogen LK film revealed the necessity of a protective pore sealing layer in dual damascene. Pore sealing materials were evaluated and SiCxHy film demonstrated exceptional barrier property against metal diffusion and good step coverage over the trench profile. By introduction of this SiCxHy layer, 10% capacitance reduction was achieved despite the higher k of the material. With the well-controlled thickness, SiCxHy pore sealing also demonstrated no via-Rc shift compared to the scheme without pore sealing, therefore excellent protection on the trench structure without via performance degradation was accomplished


Archive | 2004

Composite etching stop in semiconductor process integration

Lain-Jong Li; Tien-I Bao; Shwang-Ming Jeng; Syun-Ming Jang; Jun-Lung Huang; Jeng-Cheng Liu


Archive | 2007

Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratio

Chen-Hua Yu; Yung-Cheng Lu; Pei-Ren Jeng; Chia-Cheng Chou; Keng-Chu Lin; Chung-Chi Ko; Tien-I Bao; Shwang-Ming Jeng


Archive | 1999

Method of removing tungsten near the wafer edge after CMP

Syun-Ming Jang; Chen-Hua Yu; Shwang-Ming Jeng


Archive | 2000

Method for smoothing polysilicon gate structures in CMOS devices

Chu-Yun Fu; Chung-Long Chang; Syun-Ming Jang; Shwang-Ming Jeng


Archive | 1999

Method for forming gap filling silicon oxide intermetal dielectric (IMD) layer formed employing ozone-tEOS

Syun-Ming Jang; Ying-Ho Chen; Shwang-Ming Jeng; Chen-Hua Yu


Archive | 2008

Method for Improving the Reliability of Low-k Dielectric Materials

Keng-Chu Lin; Chia-Cheng Chou; Chung-Chi Ko; Ching-Hua Hsieh; Cheng-Lin Huang; Shwang-Ming Jeng

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Lain-Jong Li

King Abdullah University of Science and Technology

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Chiu-Chih Chiang

National Chiao Tung University

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