Steffen Paul

Memory built-in self-repair using redundant words

A word oriented memory Built-In Self-Repair (BISR) methodology is described without modifying the memory module. Faulty addresses and its data are stored in the redundancy logic immediately after its detection during test. Fuse boxes can be connected via scan registers to the redundancy logic.

An efficient Jacobi-like algorithm for parallel eigenvalue computation

A very fast Jacobi-like algorithm for the parallel solution of symmetric eigenvalue problems is proposed. It becomes possible by not focusing on the realization of the Jacobi rotation with a CORDIC processor, but by applying approximate rotations and adjusting them to single steps of the CORDIC algorithm, i.e., only one angle of the CORDIC angle sequence defines the Jacobi rotation in each step. This angle can be determined by some shift, add and compare operations. Although only linear convergence is obtained for the most simple version of the new algorithm, the overall operation count (shifts and adds) decreases dramatically. A slow increase of the number of involved CORDIC angles during the runtime retains quadratic convergence. >

Integration Without Disruption: The Basic Challenge of Sensor Integration

The basic challenge in embedding sensors in materials is to meet simultaneously two conflicting requirements; on one hand, we want to retrieve sensor data from the material and thus we have to integrate sensors, electronics, and interconnections. On the other hand, sensors are foreign bodies in the material, which may deteriorate its macroscopic properties. This paper discusses several possibilities to integrate sensors in material in a minimal invasive way, avoiding subsequent deterioration of its macroscopic performance. It is our idea to adapt the integrated sensor to the surrounding matrix and to reduce sensors volume to the minimum, which is needed to guarantee the function. This approach is called function scale integration.

Multi-User Pre-Processing in Multi-Antenna OFDM TDD Systems with Non-Reciprocal Transceivers

The combination of OFDM with joint pre-processing in adaptive multi-antenna systems offers both an ease of equalization in frequency-selective channels and keeping the signal processing at the mobile stations simple. In addition, the spatial dimension can be efficiently exploited to ensure high system throughput. With the utilization of higher-order modulation the performance of the system is highly sensitive to multiple access interference and nonorthogonal subchannels due to hardware impairments or insufficient adaptation to the current channel conditions. A further source of error in TDD systems are the non-reciprocal transceivers inhibiting the baseband-to-baseband channel reciprocity required for accurate channel state acquisition based on the uplink channel estimate. In this paper, measurement results of a low-cost hardware-based calibration are presented and the drawbacks are discussed leading to the utilization of a recently introduced relative calibration. The latter is applied to an OFDM system and achieves or at least approximates the baseband-to-baseband reciprocity. Thus, it enables the link adaptation using the uplink channel state information. Furthermore, preliminary hardware implementations of the relative calibration running on a real-time system show accurate results.

Analog rank filtering

The main task in rank filtering and many other nonlinear filtering operations is sorting. In this work, a nonlinear dynamical system for this operation is proposed. The sorting problem is embedded in a higher dimensional matrix-valued problem. An equivalent analog circuit consists of basic building blocks like adders, multipliers, and integrators which set up basic nonlinear processing cells. These processing cells are locally connected in a one-dimensional array of length N for a rank filter, with N input data elements taken as the initial values of the dynamical system. The time for sorting can be estimated theoretically and indicates fast convergence. In time complexity, the algorithm is of O(N). As opposed to a digital rank filter, the analog rank filter possesses a parameter to control the speed of convergence and the accuracy. >

Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers

Current sensing in SRAMs is very promising to achieve high-speed operation in low-voltage applications. However, so far, a main limitation of the practical use of current sense amplifiers is the finite resistance of the bitline multiplexer (MUX). In this paper, the MUX itself and its influence on two types of current sense amplifiers is analyzed. It is shown that the MUX causes a significant performance degradation. A principle is presented to compensate for the bitline multiplexer by means of a current sense amplifier with improved feedback structure. The proposed solution is implemented in a 512/spl times/24 bit SRAM macro in 0.18-/spl mu/m 1.8-V CMOS. It is shown by theory and measurements that, using the proposed circuit, it is possible to fully compensate for the MUX in terms of speed and signal amplitude with only little layout area penalty. A speed improvement due to the compensation of typically 0.5 ns is measured.

Low complexity QR-decomposition architecture using the logarithmic number system

In this paper we propose a QR-decomposition hardware implementation that processes complex calculations in the logarithmic number system. Thus, low complexity numeric format converters are installed, using nonuniform piecewise and multiplier-less function approximation. The proposed algorithm is simulated with several different configurations in a downlink precoding environment for 4×4 and 8×8 multi-antenna wireless communication systems. In addition, the results are compared to default CORDIC-based architectures. In a second step, HDL implementation as well as logical and physical CMOS synthesis are performed. The comparison to actual references highlight our approach as highly efficient in terms of hardware complexity and accuracy.

Development of a fully implantable recording system for ECoG signals

This paper presents a fully implantable neural recording system for the simultaneous recording of 128 channels. The electrocorticography (ECoG) signals are sensed with 128 gold electrodes embedded in a 10 µm thick polyimide foil. The signals are picked up by eight amplifier array ICs and digitized with a resolution of 16 bit at 10 kHz. The digitized measurement data is processed in a reconfigurable digital ASIC, which is fabricated in a 0.35 µm CMOS technology and occupies an area of 2.8×2.8mm2. After data reduction, the measurement data is fed into a transceiver IC, which transmits the data with up to 495 kbit/s to a base station, using an RF loop antenna on a flexible PCB. The power consumption of 84mW is delivered via inductive coupling from the base station.

The intelligent container as a part of the Internet of Things

Perishables need special conditions within the food supply chain like temperature or humidity. There is a lack of information along the food supply chain (FSC) concerning temperatures for perishable goods. By integrating the Intelligent Container (IC) within the Internet of Things the lack of information will be eliminated and thus wastes of food will be reduced. The first step for this integration is to analyze common techniques in modeling supply chains and especially the FSC and create a model taking into consideration the concept of the IC. On this basis, technologies to generate information along the FSC are shown and the IC is linked to the Internet of Things. Finally, a logistic reference model will be deduced from the Internet of Things for perishables.

Evaluation of the root mean square error performance of the PAST-Consensus algorithm

In previous work, we developed and investigated a distributed Projection Approximation Subspace Tracking Algorithm (PAST-Consensus) based on Consensus Propagation for wireless sensor networks. Preliminary simulation results showing a good tracking capability and still reduced complexity, have motivated us to evaluate the performance of the aforementioned algorithm. In this work, some simulation results will be presented comparing the root mean square error for several signal to noise ratios, as well as the error in the signal subspace given by its angle difference.