Takaaki Tsunomura

Understanding Random Threshold Voltage Fluctuation by Comparing Multiple Fabs and Technologies

Random threshold voltage (VM) fluctuation data obtained from multiple fabs, generations and technologies, as well as theoretical / TCAD results are carefully compared using a special normalization method. It is revealed that P-FET fluctuation can be almost fully accounted for by dopant fluctuation regardless of device generations and designs, whereas extra fluctuation mechanism(s) significantly contributes to N-FETs.

Dopant distributions in n-MOSFET structure observed by atom probe tomography

The dopant distributions in an n-type metal-oxide-semiconductor field effect transistor (MOSFET) structure were analyzed by atom probe tomography. The dopant distributions of As, P, and B atoms in a MOSFET structure (gate, gate oxide, channel, source/drain extension, and halo) were obtained. P atoms were segregated at the interface between the poly-Si gate and the gate oxide, and on the grain boundaries of the poly-Si gate, which had an elongated grain structure along the gate height direction. The concentration of B atoms was enriched near the edge of the source/drain extension where the As atoms were implanted.

Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array

Noise margin, characteristics of six individual cell transistors, and their variability in static random-access memory (SRAM) cells are directly measured using a special device-matrix-array test element group of 16-kb SRAM cells, and the correlation between the SRAM noise margin and the cell transistor variability is analyzed. It is found that each cell shows a very different supply voltage Vdd dependence of the static noise margin (SNM), and this scattered Vdd dependence of the SNM is not explained by the measured threshold voltage Vth variability alone, indicating that the circuit simulation taking only the Vth variability into account will not predict the SRAM stability precisely at low supply voltage.

Analysis of NMOS and PMOS Difference in

The mechanism of the VT variation difference between NMOS and PMOS is investigated. It is clarified that there is no correlation between VT and physical parameters such as gate length, gate width, gate oxide thickness, gate taper angle, sidewall width, channel strain, and gate poly-Si grain structure by integrated physical analysis (IPA). In IPA, the physical parameters of transistors with VT of -5sigma, median, and +5sigma are evaluated. It is also clarified that the variations of gate depletion and random charges at the gate oxide interface are not the dominant factors of VT variation, by electrical analyses using the Takeuchi plot. In these analyses, VT variations with varying process parameters are investigated. As a result of the analyses, only random channel dopant fluctuation (RDF) has a significant effect on VT variation. Since the simple RDF model alone cannot explain the VT variation difference between NMOS and PMOS, the channel boron clustering model is proposed as a possible mechanism of NMOS VT enhancement.

V_{T}

Three dimensional dopant distributions in polycrystalline Si gate of n-type (n-) and p-type (p-) metal-oxide-semiconductor field effect transistor (MOSFET) structure were investigated by laser-assisted three dimensional atom probe. The remarkable difference in dopant distribution between n-MOSFET and p-MOSFET was clearly observed. In n-MOSFET gate, As and P atoms were segregated at grain boundaries and the interface between gate and gate oxide. No diffusion of As and P atoms into the gate oxide was observed. On the other hand, in p-MOSFET, no segregations of B atoms at grain boundaries or the interface were observed, and diffusion of B atoms into the gate oxide was directly observed.

Variation With Large-Scale DMA-TEG

Randomness of threshold voltage (VT) variations of negative channel field effect transistors (NFETs) and positive channel field effect transistors (PFETs) in the 65 nm technology is precisely examined. For this purpose, an ultralarge-scale device matrix array test element group (DMA-TEG) that contains 1 million single-size metal–oxide–semiconductor field-effect transistors (MOSFETs) has been designed and fabricated, and a very rapid measurement system has been developed. By evaluating VT of a very large number of MOSFETs, VT variation can be precisely evaluated. This rapid measurement is achieved by parallel address signal input, optimization of the measurement program, and 4-chip parallel measurements. The measured VT variations are decomposed into random and systematic components. The results reveal that the random component is overwhelmingly dominant in the VT variations in the 65 nm technology and that the VT variations exhibit a normal distribution up to ±5σ.

Dopant distribution in gate electrode of n- and p-type metal-oxide-semiconductor field effect transistor by laser-assisted atom probe

The static noise margin (SNM) as well as V<inf>th</inf>, g<inf>m</inf>, body factor, and drain-induced-barrier-lowering (DIBL) in individual transistors in SRAM cells are directly measured by 16k bit device-matrix-array (DMA) SRAM TEG. It is found that, besides V<inf>th</inf> variability, DIBL variability degrades SRAM stability and its V<inf>dd</inf> dependence while the variability of g<inf>m</inf> and body factor has only a small effect.

Verification of Threshold Voltage Variation of Scaled Transistors with Ultralarge-Scale Device Matrix Array Test Element Group

The mechanism behind the threshold voltage VT variability difference between n- and p-type field-effect transistors (NFETs and PFETs, respectively) is investigated from the viewpoint of the channel dopant profile. First, the effect of the depth profile is investigated by comparing the VT variability among FETs with various depth channel profiles. It is clarified that the VT variability of NFETs is larger than that of PFETs with similar depth profiles. The effect of the lateral channel profile is also examined. As one of the causes of the modulation of the lateral channel profile, the effect of halo implantation is evaluated. It is confirmed that VT variability is enhanced with halo implantation. However, the VT variability of NFETs is still larger than that of PFETs even without halo implantation. Without halo implantation, the reverse short-channel effect appears in NFETs but not in PFETs. From this result, we find that lateral channel profile nonuniformity appears in NFETs even without halo implantation because of the transient-enhanced diffusion (TED) of the channel dopant of boron in NFETs. Since arsenic or phosphorus, which shows no TED characteristic, is used as the channel dopant in PFETs, lateral channel profile nonuniformity does not appear in PFETs without halo implantation. Channel profile nonuniformity, which is caused by boron TED, is thought to be the origin of the VT variability difference between NFETs and PFETs.

Impact of DIBL variability on SRAM static noise margin analyzed by DMA SRAM TEG

Using 1M DMA-TEG, the analyses of 5sigma Vth fluctuation in 65 nm-MOSFETs were carried out. Physical and electrical analyses confirmed that random dopant fluctuation is dominant though NMOSFET has larger fluctuation as compared with PMOSFET. To explain this phenomenon, a B clustering model is proposed. In the case of clustering with 5 to 6 B atoms in the channel, Vth fluctuation of NMOSFET can be explained.

Effect of Channel Dopant Profile on Difference in Threshold Voltage Variability Between NFETs and PFETs

Causes of drain current local variability are analyzed by decomposing into current variability components. Besides VTH and Gm components, it is newly found that effects of “current onset” variability caused by channel potential fluctuations largely contribute to the current variability and that Gm component is relatively small in the saturation region. It is shown that both VTH and current onset components decreases with reducing channel dopants, indicating that intrinsic channel is very effective to reduce current variability.