Tom Faure

Experimental result and simulation analysis for the use of pixelated illumination from source mask optimization for 22nm logic lithography process

We demonstrate experimentally for the first time the feasibility of applying SMO technology using pixelated illumination. Wafer images of SRAM contact holes were obtained to confirm the feasibility of using SMO for 22nm node lithography. There are still challenges in other areas of SMO integration such as mask build, mask inspection and repair, process modeling, full chip design issues and pixelated illumination, which is the emphasis in this paper. In this first attempt we successfully designed a manufacturable pixelated source and had it fabricated and installed in an exposure tool. The printing result is satisfactory, although there are still some deviations of the wafer image from simulation prediction. Further experiment and modeling of the impact of errors in source design and manufacturing will proceed in more detail. We believe that by tightening all kind of specification and optimizing all procedures will make pixelated illumination a viable technology for 22nm or beyond. Publishers Note: The author listing for this paper has been updated to include Carsten Russ. The PDF has been updated to reflect this change.

Demonstrating the benefits of source-mask optimization and enabling technologies through experiment and simulations

In recent years the potential of Source-Mask Optimization (SMO) as an enabling technology for 22nm-and-beyond lithography has been explored and documented in the literature.1-5 It has been shown that intensive optimization of the fundamental degrees of freedom in the optical system allows for the creation of non-intuitive solutions in both the mask and the source, which leads to improved lithographic performance. These efforts have driven the need for improved controllability in illumination5-7 and have pushed the required optimization performance of mask design.8, 9 This paper will present recent experimental evidence of the performance advantage gained by intensive optimization, and enabling technologies like pixelated illumination. Controllable pixelated illumination opens up new regimes in control of proximity effects,1, 6, 7 and we will show corresponding examples of improved through-pitch performance in 22nm Resolution Enhancement Technique (RET). Simulation results will back-up the experimental results and detail the ability of SMO to drive exposure-count reduction, as well as a reduction in process variation due to critical factors such as Line Edge Roughness (LER), Mask Error Enhancement Factor (MEEF), and the Electromagnetic Field (EMF) effect. The benefits of running intensive optimization with both source and mask variables jointly has been previously discussed.1-3 This paper will build on these results by demonstrating large-scale jointly-optimized source/mask solutions and their impact on design-rule enumerated designs.

Lithographic qualification of new opaque MoSi binary mask blank for the 32-nm node and beyond

We discuss the lithographic qualification of a new type of binary mask blank consisting of an opaque layer of MoSi on a glass substrate, referred to simply as OMOG. First, OMOG lithographic performance will be compared to a previous chrome/MoSi/glass binary intensity mask (BIM) blank. Standard 70-nm chrome on class (COG) was not considered, as it failed to meet mask-making requirements. Theory and a series of simulation and experimental studies show OMOG to outperform BIM, particularly due to electromagnetic effects and optical proximity correction (OPC) predictability concerns, as OMOG behaves very similarly to the ideal thin mask approximation (TMA). A new TMA-predictability metric is defined as a means to compare mask blanks. We weigh the relative advantages and disadvantages of OMOG compared to 6% attenuated phase shifting. Although both mask blanks are likely sufficient for the 32-nm and 22-nm nodes, some differences exist and are described. Overall, however, of the blanks considered, it is concluded that OMOG provides the most robust and extendable imaging solution available for 32-nm and beyond.

Improving the power-performance of multicore processors through optimization of lithography and thermal processing

It is generally assumed that achieving a narrow distribution of physical gate length (Lpoly) for the poly conductor layer helps improve power performance metrics of modern integrated circuits. However, in advanced 90 nm technologies, there are other drivers of chip performance. In this paper we show that a global optimization of all variables is necessary to achieve the optimum performance at the lowest leakage. We will also describe how systematic physical gate-length variation can improve core matching in multicore designs.

Meeting critical gate linewidth control needs at the 65 nm node

With the nominal gate length at the 65 nm node being only 35 nm, controlling the critical dimension (CD) in polysilicon to within a few nanometers is essential to achieve a competitive power-to-performance ratio. Gate linewidths must be controlled, not only at the chip level so that the chip performs as the circuit designers and device engineers had intended, but also at the wafer level so that more chips with the optimum power-to-performance ratio are manufactured. Achieving tight across-chip linewidth variation (ACLV) and chip mean variation (CMV) is possible only if the mask-making, lithography, and etching processes are all controlled to very tight specifications. This paper identifies the various ACLV and CMV components, describes their root causes, and discusses a methodology to quantify them. For example, the site-to-site ACLV component is divided into systematic and random sub-components. The systematic component of the variation is attributed in part to pattern density variation across the field, and variation in exposure dose across the slit. The paper demonstrates our teams success in achieving the tight gate CD tolerances required for 65 nm technology. Certain key challenges faced, and methods employed to overcome them are described. For instance, the use of dose-compensation strategies to correct the small but systematic CD variations measured across the wafer, is described. Finally, the impact of immersion lithography on both ACLV and CMV is briefly discussed.

High resolution mask process and substrate for 20nm and early 14nm node lithography

The lithography challenges posed by the 20 nm and 14 nm nodes continue to place strict minimum feature size requirements on photomasks. The wide spread adoption of very aggressive Optical Proximity Correction (OPC) and computational lithography techniques that are needed to maximize the lithographic process window at 20 nm and 14 nm groundrules has increased the need for sub-resolution assist features (SRAFs) down to 50 nm on the mask. In addition, the recent industry trend of migrating to use of negative tone develop and other tone inversion techniques on wafer in order to use bright field masks with better lithography process window is requiring mask makers to reduce the minimum feature size of opaque features on the reticle such as opaque SRAFs. Due to e-beam write time and pattern fidelity requirements, the increased use of bright field masks means that mask makers must focus on improving the resolution of their negative tone chemically amplified resist (NCAR) process. In this paper we will describe the development and characterization of a high resolution bright field mask process that is suitable for meeting 20 nm and early 14 nm optical lithography requirements. Work to develop and optimize use of an improved chrome hard mask material on the thin OMOG binary mask blank1 in order to resolve smaller feature sizes on the mask will be described. The improved dry etching characteristics of the new chrome hard mask material enabled the use of a very thin (down to 65 nm) NCAR resist. A comparison of the minimum feature size, linearity, and through pitch performance of different NCAR resist thicknesses will also be described. It was found that the combination of the improved mask blank and thinner NCAR could allow achievement of 50 nm opaque SRAFs on the final mask.. In addition, comparisons of the minimum feature size performance of different NCAR resist materials will be shown. A description of the optimized cleaning processes and cleaning durability of the 50 nm opaque SRAFs will be provided. Furthermore, the defect inspection results of the new high resolution mask process and substrate will be shared.

Development and Characterization of a Thinner Binary Mask Absorber for 22 nm node and Beyond

The lithography challenges posed by the 22 nm node continue to place stringent requirements on photomasks. The dimensions of the mask features continue to shrink more deeply into the sub-wavelength scale. In this regime residual mask electromagnetic field (EMF) effects due to mask topography can degrade the imaging performance of critical mask patterns by degrading the common lithography process window and by magnifying the impact of mask errors or MEEF. Based on this, an effort to reduce the mask topography effect by decreasing the thickness of the mask absorber was conducted. In this paper, we will describe the results of our effort to develop and characterize a binary mask substrate with an absorber that is approximately 20-25% thinner than the absorber on the current Opaque MoSi on Glass (OMOG) binary mask substrate. For expediency, the thin absorber development effort focused on using existing absorber materials and deposition methods. It was found that significant changes in film composition and structure were needed to obtain a substantially thinner blank while maintaining an optical density of 3.0 at 193 nm. Consequently, numerous studies to assess the mask making performance of the thinner absorber material were required and will be described. During these studies several significant mask making advantages of the thin absorber were discovered. The lower film stress and thickness of the new absorber resulted in improved mask flatness and up to a 60% reduction in process-induced mask pattern placement change. Improved cleaning durability was another benefit. Furthermore, the improved EMF performance of the thinner absorber [1] was found to have the potential to relieve mask manufacturing constraints on minimum opaque assist feature size and opaque corner to corner gap. Based on the results of evaluations performed to date, the thinner absorber has been found to be suitable for use for fabricating masks for the 22 nm node and beyond.

Understanding the trade-offs of thinner binary mask absorbers

Mask topography is only one of the challenges for extending 193nm immersion lithography to 22nm and beyond. Migration to binary but thinner mask absorbers, from the previously employed attenuated phase-shift mask (attnPSM) technology, traded a tolerable loss in contrast for better mask making performance and reduced electromagnetic field (EMF) impact [1]. The relentless technological advances in 193nm lithography required to enable 22nm technology, however, continue to drive the dimensions of mask features deep into sub-wavelength scale. In this regime, residual mask EMF effects can still degrade the imaging performance of critical mask patterns, often in the form of featuredependent biasing and shifts of the plane of best focus that shrink the common process window and magnify the impact of mask errors. In this paper we investigate the potential benefits in EMF effects mitigation provided by further thinning the mask absorber to the minimum possible while retaining the required opacity. This study was motivated by the narrower process variability bands observed on a 22nm structure with high EMF sensitivity, when computed with rigorous EMF simulations using a thinner absorber. Resist measurements on wafers exposed with the same EMF sensitive structure built on either the standard binary mask or the thinner sample, confirmed the lower sensitivity to mask topography of the latter while also providing a significant process window improvement. We further observed that thinner topography allowed for a smaller topography induced bias, resulting in improved mask manufacturability with less risk for mask corrections to be limited by mask manufacturability rules such as small assist features and small corner to corner gaps. Thinning the absorber, however, is typically accompanied by an increase in reflectivity of the mask blank which may influence the nature of stray light in the imaging system. To understand the consequences of increasing the blank reflectivity, a double expose scheme was used to measure stray light and determine the relative contribution from the imaging system optics, the mask blank reflectivity, and pellicle thickness. Initial results show that the increased reflectivity of the thinner absorber film has minimal impact on stray light effects in the scanner and that the overall mask reflectivity at high angles is typically dominated by the pellicle thickness. The thin binary absorber should be used in conjunction with a thin pellicle. In this paper we will also explore other relevant characteristics of these novel mask blanks, such as diffraction efficiency, EMF-induced focus drift, changes in contrast, and the implications for increased reflectivity, smaller assist feature size and other lithographic considerations. These results will be demonstrated with rigorous electromagnetic simulations as well as AIMS and wafer measurements on a set of EMF sensitive structures for 22nm contact and metal layers, while simultaneously verifying that the imaging performance of the remaining patterns is unaffected. The use of thinner absorber film also improves the mask making process, contributing to better mask critical dimension (CD) uniformity and overall better lithographic performance as discussed in [2].

Two-dimensional mask effects at the 14 nm logic node

At the 14 nm logic node, significant lithographic changes relative to previous technologies are needed to resolve smaller features with increased fragmentation in mask design and increased use of sub-resolution assist features. Extending the application of 193 immersion lithography for further generations requires not only continued reduction of traditional sources of variation but investigation into and quantification of the impact of completely new ones, such as mask twodimensional (2D) variability. To improve the overall lithography model accuracy, two-dimensional (2D) data from the mask is required to complete a mask model with an optimal wafer response. This paper characterizes and assesses the importance of 2D mask effects on thin opaque MoSi on glass (OMOG) masks. Methodologies for characterizing corner rounding in terms of corner rounding radius and contact area are presented. Optical mask 2D measurements and wafer print results are summarized.

Characterization of a new polarity switching negative tone e-beam resist for 14nm and 10nm logic node mask fabrication and beyond

The critical layer masks for 14 nm and 10 nm logic nodes are typically bright field, and the key features are opaque structures on the mask. In order to meet the tight critical dimension (CD) requirements on these opaque features the use of a high quality negative tone chemically amplified e-beam resist (NCAR) is required. Until very recently the only negative tone e-beam resists available for use by the mask industry were the traditional cross linking type in which ebeam exposure cross links the material and makes it insoluble in developer. In this paper we will describe the performance of a new polarity switching type of NCAR resist that works by changing the solubility of the exposed resist without cross linking. This has the advantage of significantly reduced swelling and scumming and resulted in major improvements in the resolution of heavily nested features and small clear features on the mask. Additional detailed characterization results will be described.