Tsukasa Abe

Natural EUV mask blank defects: evidence, timely detection, analysis and outlook

A combination of blank inspection (BI), patterned mask inspection (PMI) and wafer inspection (WI) is used to find as many as possible printing defects on two different EUV reticles. These multiple inspections result in a total population of known printing defects on each reticle. The printability of these defects is first confirmed by wafer review on wafers exposed on the full field ASML Alpha Demo Tool (ADT) at IMEC. Subsequently reticle review is performed on the corresponding locations with both SEM (Secondary Electron Microscope) and AFM (Atomic Force Microscope). This review methodology allows to separate absorber related mask defects and multi layer (ML) related mask defects. In this investigation the focus is on ML defects, because this type of reticle defects is EUV specific, and not as evolutionary as absorber defects which can be mitigated in more conventional ways. This work gives evidence of critical printing ML defects of natural origin, both pits as shallow as 3nm and bumps just 3nm high at the surface. Wafer inspection was the first inspection technique to detect these ML-defects with marginal surface height distortion, because both state-of-the-art PMI and especially standard BI on the Lasertec M1350 had failed to detect these defects. Compared to standard BI, the more advanced Lasertec M7360 is found to have much better sensitivity for printing MLdefects and our work so far shows no evidence of printing ML defects missed by this tool. Unfortunately it was also observed that this required sensitivity was only achieved at the cost of an unacceptable nuisance rate, i.e., with a too high number of detections of non-printing defects. Optical blank inspection is facing major challenges : It needs not only to find ML defects with height distortions of 3nm and less (and in theory maybe even 0nm), but also it must be able to disposition between such likely-printing and non-printing defects.

EUVL practical mask structure with light shield area for 32nm half pitch and beyond

The effect of mask structure with light shield area on the printability in EUV lithography was studied. When very thin absorber on EUVL mask is used for ULSI application, it then becomes necessary to create EUV light shield area on the mask in order to suppress possible leakage of EUV light from neighboring exposure shots. We proposed and fabricated two types of masks with very thin absorber and light shield area structure. For both types of masks we demonstrated high shield performances at light shield areas by employing a Small Field Exposure Tool (SFET).

Process development for EUV mask production

Absorber layer patterning process for low reflectivity tantalum boron nitride (LR-TaBN) absorber layer and chromium nitride (CrN) buffer layer were improved to satisfy high resolution pattern and high level critical dimension (CD) control. To make 100nm and smaller pattern size, under 300nm resist thickness was needed because of resist pattern collapse issue. We developed absorber layer dry etching process for 300nm thickness resist. Absorber layer patterning was done by a consequence of carbon fluoride gas process and chlorine gas process. We evaluated both gas processes and made clear each dry etching character. Sufficient resist selectivity, vertical side wall, good CD control and low buffer layer damage were obtained. Then, we evaluated how buffer layer dry etching affects EUV reflectivity. Finally, we evaluated EUV mask pattern defect inspection and defect repair. Sufficient contrast of mask pattern image and good repair result were obtained using DUV inspection tool and AFM nano-machining tool, respectively.

Demonstration of defect free EUV mask for 22nm NAND flash contact layer using electron beam inspection system

Fabrication of defect free EUV masks including their inspection is the most critical challenge for implementing EUV lithography into semiconductor high volume manufacturing (HVM) beyond 22nm half-pitch (HP) node. The contact to bit-line (CB) layers of NAND flash devices are the most likely the first lithography layers that EUV will be employed for manufacturing due to the aggressive scaling and the difficulty for making the pattern with the current ArF lithography. To assure the defect free EUV mask, we have evaluated electron beam inspection (EBI) system eXplore™ 5200 developed by Hermes Microvision, Inc. (HMI) [1]. As one knows, the main issue of EBI system is the low throughput. To solve this challenge, a function called Lightning Scan™ mode has been recently developed and installed in the system, which allows the system to only inspect the pattern areas while ignoring blanket areas, thus dramatically reduced the overhead time and enable us to inspect CB layers of NAND Flash device with much higher throughput. In this present work, we compared the Lightning scan mode with Normal scan mode on sensitivity and throughput. We found out the Lightning scan mode can improve throughput by a factor of 10 without any sacrifices of sensitivity. Furthermore, using the Lightning scan mode, we demonstrated the possibility to fabricate the defect free EUV masks with moderate inspection time.

EUV-mask pattern inspection using current DUV reticle inspection tool

EUV mask pattern inspection was investigated using current DUV reticle inspection tool. Designed defect pattern of 65nm node and 45nm node were prepared. We compared inspection sensitivity between before buffer etch pattern and after buffer etch pattern, and between die to die mode and die to database mode. Inspection sensitivity difference was not observed between before buffer etch pattern and after buffer etch pattern. In addition to defect inspection, wafer print simulation of program defect was investigated. Simulation results were compared to inspection result. We confirmed current DUV reticle inspection tool has potential for EUV mask defect inspection.

Evaluation of dry etching and defect repair of EUVL mask absorber layer

EUVL mask process of absorber layer, buffer layer dry etching and defect repair were evaluated. TaGeN and Cr were selected for absorber layer and buffer layer, respectively. These absorber layer and buffer layer were coated on 6025 Qz substrate. Two dry etching processes were evaluated for absorber layer etching. One is CF4 plasma process and the other is Cl2 plasma process. Etch bias uniformity, selectivity, cross section profile and resist damage were evaluated for each process. Disadvantage of CF4 plasma process is low resist selectivity and Cl2 plasma process is low Cr selectivity. CF4 plasma process caused small absorber layer damage on isolate line and Cl2 plasma process caused Cr buffer layer damage. To minimize these damages overetch time was evaluated. Buffer layer process was also evaluated. Buffer layer process causes capping layer damage. Therefore, etching time was optimized. FIB-GAE and AFM machining were applied for absorber layer repair test. XeF2 gas was used for FIB-GAE. Good selectivity between absorber layer and buffer layer was obtained using XeF2 gas. However, XeF2 gas causes side etching of TaGeN layer. AFM machining repair technique was demonstrated for TaGeN layer repair.

Phase defect detection signal analysis: dependence of defect size variation

Abstract. The influence of the size or volume of the phase defect embedded in the extreme ultraviolet mask on wafer printability by scanning probe microscope (SPM) is well studied. However, only a few experimental results on the measurement accuracy of the phase defect size have been reported. Therefore, in this study, the measurement repeatability of the phase defect volume using SPM and the influence of the defect volume distribution on defect detection signal intensity (DSI) using an at-wavelength dark-field defect inspection tool were examined. A programmed phase defect mask was prepared, and a defect size measurement repeatability test was conducted using an SPM. As a result, the variation of the measured volume due to the measurement repeatability was much smaller than that of the defect-to-defect variation. This result indicates that measuring the volume of each phase defect is necessary in order to evaluate the defect detection yield using a phase defect inspection tool and wafer printability. In addition, the images of phase defects were captured using an at-wavelength dark-field inspection tool from which the defect DSIs were calculated. The DSI showed a direct correlation with the defect volume.

Electron beam inspection of 16nm HP node EUV masks

EUV lithography (EUVL) is the most promising solution for 16nm HP node semiconductor device manufacturing and beyond. The fabrication of defect free EUV mask is one of the most challenging roadblocks to insert EUVL into high volume manufacturing (HVM). To fabricate and assure the defect free EUV masks, electron beam inspection (EBI) tool will be likely the necessary tool since optical mask inspection systems using 193nm and 199nm light are reaching a practical resolution limit around 16nm HP node EUV mask. For production use of EBI, several challenges and potential issues are expected. Firstly, required defect detection sensitivity is quite high. According to ITRS roadmap updated in 2011, the smallest defect size needed to detect is about 18nm for 15nm NAND Flash HP node EUV mask. Secondly, small pixel size is likely required to obtain the high sensitivity. Thus, it might damage Ru capped Mo/Si multilayer due to accumulated high density electron beam bombardments. It also has potential of elevation of nuisance defects and reduction of throughput. These challenges must be solved before inserting EBI system into EUV mask HVM line. In this paper, we share our initial inspection results for 16nm HP node EUV mask (64nm HP absorber pattern on the EUV mask) using an EBI system eXplore® 5400 developed by Hermes Microvision, Inc. (HMI). In particularly, defect detection sensitivity, inspectability and damage to EUV mask were assessed. As conclusions, we found that the EBI system has capability to capture 16nm defects on 64nm absorber pattern EUV mask, satisfying the sensitivity requirement of 15nm NAND Flash HP node EUV mask. Furthermore, we confirmed there is no significant damage to susceptible Ru capped Mo/Si multilayer. We also identified that low throughput and high nuisance defect rate are critical challenges needed to address for the 16nm HP node EUV mask inspection. The high nuisance defect rate could be generated by poor LWR and stitching errors during EB writing of 64nm HP resist pattern. This result suggests we need further improvements not only in the EBI inspection system but also the patterning processes for 16nm HP node EUV masks.

Evaluation of defect repair of EUV mask absorber layer

Nano-machining repair technique is relatively new technology for photomask repairing. The advantages of this technique are low substrate damage, precise edge placement accuracy and improved Z height accuracy comparison with Laser zapper or FIB GAE repair techniques. In this work, we have evaluated nano-machining technique capability for EUV mask repair. To get good wafer print results, additional side etch(X bias) and depth etch (Z bias) were needed. Defect repaired region was evaluated using CD-SEM, AFM and wafer print test. Good repair profile and good wafer print results were successfully obtained.

Study of mask process development for EUVL

EUVL mask process of absorber layer dry etching and defect repair were evaluated. TaGeN and Cr were selected for absorber layer and buffer layer, respectively. These absorber layer and buffer layer were coated on 6025 Qz substrate. Two dry etching processes were evaluated for absorber layer etching. One is CF4 gas process and the other is Cl2 gas process. CD uniformity, selectivity, cross section profile and resist damage were evaluated for each process. FIB-GAE and AFM machining were applied for absorber layer repair test. XeF2 gas was used for FIB-GAE. Good selectivity between absorber layer and buffer layer was obtained using XeF2 gas. However, XeF2 gas causes side etching of TaGeN layer. AFM machining repair technique was demonstrated for TaGeN layer repair.