Yuichi Inazuki

Decomposition difficulty analysis for double patterning and the impact on photomask manufacturability

Double patterning technology (DPT) is one of the most practical candidate technologies for 45nm half-pitch or beyond while conventional single exposure (SE) is still dominant with hyper NA avoiding DPT difficulties such as split-conflict or overlay issue. However small target dimension with hyper NA and strong illumination causes OPC difficulty and small latitude of lithography and photomask fabricated with much tight specification are required for SE. Then there must be double patterning (DP) approach even for SE available resolution. In this paper DP for SE available resolution is evaluated on lithography performance, pattern decomposition, photomask fabrication and inspection load. DP includes pattern pitch doubled of SE, then lithography condition such as mask error enhancement factor (MEEF) is less impacted and the lower MEEF means less tight specification for photomask fabrication. By using Synopsys DPT software, there are no software-induced conflicts and stitching is treated to be less impact. And also this software detects split-conflicts such as triangle or square placement from contact spacing. For estimating photomask inspection load, programmed defect pattern and circuit pattern on binary mask are prepared. Smaller MEEF leads less impact to defect printing which is confirmed with AIMS evaluation. As an inspection result, there are few differences of defect sensitivity for only dense features and also few differences of false defect counts between SE and DP with less NA. But if higher NA used, DPs inspection sensitivity is able to be lowered Then inspection load for DP would be lighter than SE.

Demonstration of defect free EUV mask for 22nm NAND flash contact layer using electron beam inspection system

Fabrication of defect free EUV masks including their inspection is the most critical challenge for implementing EUV lithography into semiconductor high volume manufacturing (HVM) beyond 22nm half-pitch (HP) node. The contact to bit-line (CB) layers of NAND flash devices are the most likely the first lithography layers that EUV will be employed for manufacturing due to the aggressive scaling and the difficulty for making the pattern with the current ArF lithography. To assure the defect free EUV mask, we have evaluated electron beam inspection (EBI) system eXplore™ 5200 developed by Hermes Microvision, Inc. (HMI) [1]. As one knows, the main issue of EBI system is the low throughput. To solve this challenge, a function called Lightning Scan™ mode has been recently developed and installed in the system, which allows the system to only inspect the pattern areas while ignoring blanket areas, thus dramatically reduced the overhead time and enable us to inspect CB layers of NAND Flash device with much higher throughput. In this present work, we compared the Lightning scan mode with Normal scan mode on sensitivity and throughput. We found out the Lightning scan mode can improve throughput by a factor of 10 without any sacrifices of sensitivity. Furthermore, using the Lightning scan mode, we demonstrated the possibility to fabricate the defect free EUV masks with moderate inspection time.

Pattern decomposition for double patterning from photomask viewpoint

Double Patterning Technology (DPT) has been evaluated and reported since 32nm half pitch is recognized to be required with conventional immersion ArF lithography. DPT requires pattern decomposition into two pattern sets and the decomposition becomes more complex for especially so-called logic pattern including irregular pattern placement and many-vertices polygons. The innocent decomposition often creates forced segmentation of those polygons and two different aspect of photomasks such as density or substantial line direction. Those decomposed photomasks not only produce large possibilities of different error behavior but also leave annoyance complexity untouched. It is well known that line-ends and dense twisted lines produce large MEF. Then tighter specification for photomask fabrication have been required since the resolution limit was getting below the exposure wavelength. So the decomposition that creates tight patterns into separate two photomasks has possibilities of the fabrication load lighter. In this paper, the decomposition of criteria for DPT which helps photomask fabrication with a small possibilities is evaluated and discussed. Furthermore though its getting to popular that overlay and CD uniformity of photomasks for DPT impact to completed CD with wafer exposure directly, considering other errors such as CD shift or phase error which are supposed to recover by exposure in addition to those errors are also studied.

In-field CD uniformity control by altering transmission distribution of the photomask, using Ultra fast pulsed laser technology

As pattern feature sizes on the wafer become smaller and smaller, requirements for CD variation control has become a critical issue. In order to correct CD uniformity on the wafer, the DUV light transmission distribution of the photomask was altered using an ultra-fast pulsed laser technology. By creating a small scattering pixel inside the quartz body of the mask, a multitude of such points creates Shading Elements inside the quartz according to a predetermined CD variations distribution map. These Shading Elements reduce the dose of scanners laser illumination onto the wafer per a local area. Thus by changing the local light intensity, inside the exposure field, to a required level during the photolithographic process the wafer CD is changed locally inside the field. This complete process of writing a multitude of Shading Elements inside the mask in order to control the light transmission and hence wafer level CD locally is called the CD Control (CDC) process. We have evaluated the tool utilizing Ultra fast laser pulses (CDC 101) for local transmission and CD controllability on the wafer. We used Binary and Att-PSM test masks and three kinds of test patterns to confirm the sensitivity of transmission and CD change by the attenuation levels of Shading Elements which is sequentially changed from 0% to 10%. We will compare the AIMS results to printed CD on wafer or simulation results, so that we can correlate the transmission change and CD change by the attenuation levels. This paper also reports the CD uniformity correction performances by using attenuation mapping method on Binary mask. We also cover how Shading Elements affect the phase and transmission on the Att-PSM.

Lithographic performance comparison with various RET for 45-nm node with hyper NA

In order to realize 45 nm node lithography, strong resolution enhancement technology (RET) and water immersion will be needed. In this research, we discussed about various RET performance comparison for 45 nm node using 3D rigorous simulation. As a candidate, we chose binary mask (BIN), several kinds of attenuated phase-shifting mask (att-PSM) and chrome-less phase-shifting lithography mask (CPL). The printing performance was evaluated and compared for each RET options, after the optimizing illumination conditions, mask structure and optical proximity correction (OPC). The evaluation items of printing performance were CD-DOF, contrast-DOF, conventional ED-window and MEEF, etc. Its expected that effect of mask 3D topography becomes important at 45 nm node, so we argued about not only the case of ideal structures, but also the mask topography error effects. Several kinds of mask topography error were evaluated and we confirmed how these errors affect to printing performance.

Short-range Electron Backscattering from EUV masks

Electron backscattering from Extreme Ultraviolet (EUV) masks during Electron Beam (EB) exposure was studied by simulations and experiments. The film structure of EUV masks is quite different from that of photomasks. The Mo/Si multilayer on the EUV substrate is very thick (280 nm) and heavy metal material such as Ta is used for the absorber. Monte Carlo simulations suggest that the absorbed energy inside the resist caused by the backscattered electrons from these films is non-negligible, about 1/10 of the forward scattering electrons and 1/4 of the backscattered electrons from the substrate. Also the simulations show that the influence range is very short because the backscattering happens near the mask surface. These simulations were verified by conducting EB exposure experiments. Short-range proximity effect was clearly observed by measuring the resist Critical Dimentions (CDs) of short bars laid beside the large exposed area. The data were fitted by assuming a backscattering electron distribution which has an exponential form with 0.4 μm range. The range is very short compared with the conventional proximity range of 10 μm. We conclude that the conventional EB proximity effect correction method needs to be revisited for EUV masks.

Native pattern defect inspection of EUV mask using advanced electron beam inspection system

Fabrication of defect free EUV mask is one of the most critical roadblocks for implementing EUV lithography into semiconductor high volume manufacturing for 22nm half-pitch (HP) node and beyond. At the same time, development of quality assurance process for the defect free EUV mask is also another critical challenge we need to address before the mass production. Inspection tools act important role in quality assurance process to ensure the defect free EUV mask. We are currently evaluating two types of inspection system: optical inspection (OPI) system and electron beam inspection (EBI) system [1, 2]. While OPI system is sophisticated technology and has an advantage in throughput, EBI system is superior in sensitivity and extendability to even small pattern. We evaluated sensitivity of EBI system and found it could detect 25 nm defects on 88nm L/S pattern which is as small as target defect size for 23 nm Flash HP pattern in 2013 in 2009 ITRS lithography roadmap [2, 3]. EBI system is effective inspection tool even at this moment to detect such small defects on 88nm HP pattern, though there are still some challenges such as the slow throughput and the reliability. Therefore, EBI system can be used as bridge tool to compensate insufficient sensitivity of current inspection tools and improve EUV mask fabrication process to achieve the defect free EUV mask. In this paper, we will present the results of native pattern defects founded on large field 88nm HP pattern using advance EBI system. We will also classify those defects and propose some ideas to mitigate them and realize the defect free EUV mask, demonstrating the capability of EBI as bridge tool.

45-32-nm node photomask technology with water immersion lithography

As for 32-nm node (minimum half pitch 45-nm) logic device of the next generation, the leading semiconductor device makers propose the following three kinds of lithography techniques as a candidate, multi-exposure with water immersion lithography. So we will evaluate them. In previous work, we evaluated the resolution limit and printing performance through various pitches of 45-nm node (minimum half pitch 65-nm) lithography. We evaluated the alternate aperture phase shift mask(alt-PSM) of NA=0.93 (dry and immersion) and various resolution enhancement technologies (RETs) with off-axis and polarized illumination of NA=1.07(water immersion). The minimum k1 examined at previous time was 0.31 and 0.39 respectively. To achieve 32-nm node of the next generation with water immersion lithography, we must use higher NA but yet severe k1. The combination of the strong RET, polarization and multi-exposure is thought to be required. In order to resolve severe k1 (<0.3), the double patterning is thought as a promising candidate technology, though the disadvantageous points will appear such as very severe alignment accuracy and the twice process of wafer. In this report, we will discuss some RETs such as double dipole lithography(DDL), double patterning lithography(DPL) and alt-PSM that have sufficient printing performance through various pitches of 32-nm node. We evaluate the effect and the performance of the selected lithography side RETs and mask material RETs for each, using optical simulation software.

Challenge for under 40nm size pattern making for EUV mask

Extreme Ultraviolet Lithography (EUVL) is a promising technology for the next generation lithography. It will be applied for half pitch 16nm node and beyond. The pattern resolution of recent EUV lithography is around hp20nm and next target is hp16nm. Although present requirement for EUV mask pattern resolution is hp64 nm, there is a special request to make under 40nm size pattern for EUV mask. One of examples is programmed phase defect mask (PDM). Phase defect of EUV blank affects large influence to wafer print result. Blank inspection is one of the key technology for EUV mask fabrication. To evaluate blank inspection tool, program defect mask is essential. Other examples are EUV mask for EUV diffraction exposure tool and EUV microscope evaluation. These masks need absorber pattern resolution of 30nm and smaller. In this paper, we will present process development results targeting 30nm size pattern. Programmed defect size achieved to 20nm width (FWHM: width at half maximum), 1.0nm height, both pit and bump defect. Absorber pattern resolution achieved 30nm half pitch. Not only simple dense line pattern, we fabricated radial pattern and any angle pattern.

NGL masks: development status and issue

Semiconductor lithography candidates toward 2xnm node and beyond include wide variety of options, such as extension of 193i, EUVL, NIL, and ML2. Most of those candidates, except ML2, need critical mask feature to realize effective high volume manufacturing. In this presentation, EUVL mask technology update and future issues will be presented.