Vassilios Papageorgiou

Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material

REDUCING SILICIDE RESISTANCE IN SILICON/GERMANIUM-CONTAINING DRAIN/SOURCE REGIONS OF TRANSISTORS

ADJUSTING OF A NON-SILICON FRACTION IN A SEMICONDUCTOR ALLOY DURING TRANSISTOR FABRICATION BY AN INTERMEDIATE OXIDATION PROCESS

ADJUSTING CONFIGURATION OF A MULTIPLE GATE TRANSISTOR BY CONTROLLING INDIVIDUAL FINS

Transistor device comprising an embedded semiconductor alloy having an asymmetric configuration

STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-INDUCING SEMICONDUCTOR ALLOY BY CREATING A PATTERNING NON-UNIFORMITY AT THE BOTTOM OF THE GATE ELECTRODE

SEMICONDUCTOR ELEMENT FORMED IN A CRYSTALLINE SUBSTRATE MATERIAL AND COMPRISING AN EMBEDDED IN SITU N-DOPED SEMICONDUCTOR MATERIAL

Transistor device comprising an asymmetric embedded semiconductor alloy

Verformungserhöhung in Transistoren mit einer eingebetteten verformungsinduzierenden Halbleiterlegierung durch Erzeugen von Strukturierungsungleichmäßigkeiten an der Unterseite der Gateelektrode

Verringern des Silizidwiderstands in SiGe-enthaltenden Drain/Source-Gebieten von Transistoren