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Dive into the research topics where Wade J. Hodge is active.

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Featured researches published by Wade J. Hodge.


bipolar/bicmos circuits and technology meeting | 2007

A 0.35 μm SiGe BiCMOS technology for power amplifier applications

Alvin J. Joseph; Qizhi Liu; Wade J. Hodge; Peter B. Gray; Kenneth J. Stein; Rose Previti-Kelly; Peter J. Lindgren; Ephrem G. Gebreselasie; Ben Voegeli; Panglijen Candra; Doug Hershberger; Ramana M. Malladi; Ping-Chuan Wang; K. Watson; Zhong-Xiang He; James S. Dunn

In this paper we introduce, a state-of-the-art SiGe BiCMOS power amplifier technology that features two NPNs with 40 GHz / 6.0 V & 27 GHz / 8.5 V (fT - BVceo) respectively, a novel low inductance metal ground through-silicon-via (TSV), integrated on a low-cost 0.35 μm lithography node with 3.3 V / 5.0 V dual-gate CMOS technology and high-quality passives on a 50 Ω.cm substrate.


bipolar/bicmos circuits and technology meeting | 2002

High performance, low complexity 0.18 /spl mu/m SiGe BiCMOS technology for wireless circuit applications

Natalie B. Feilchenfeld; Louis D. Lanzerotti; David C. Sheridan; Ryan W. Wuthrich; Peter J. Geiss; D. Coolbaugh; Peter B. Gray; J. He; P. Demag; J. Greco; T. Larsen; V. Patel; Michael J. Zierak; Wade J. Hodge; Jay Rascoe; J. Trappasso; Bradley A. Orner; A. Norris; Douglas B. Hershberger; B. Voegeli; Steven H. Voldman; Robert M. Rassel; V. Ramachandrian; Michael L. Gautsch; Ebenezer E. Eshun; R. Hussain; D. Jordan; S. St Onge; James S. Dunn

High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that offers 3 different breakdown voltage NPNs; with the high performance device achieving F/sub t//F/sub max/ of 60/85 GHz with a 3.0 V BV/sub CEO/. In addition, a full suite of high performance passive devices complement the state-of-the-art SiGe wireless HBTs.


bipolar/bicmos circuits and technology meeting | 2004

A low complexity 0.13 /spl mu/ SiGe BiCMOS technology for wireless and mixed signal applications

Louis D. Lanzerotti; Natalie B. Feilchenfeld; D. Coolbaugh; James A. Slinkman; Peter B. Gray; David C. Sheridan; J. Higgins; Wade J. Hodge; M. Gordon; T. Larsen; Michael L. Gautsch; P. Lindgren; R. Murty; Jay Rascoe; K. Watson; T. Stamper; Ebenezer E. Eshun; J. He; K. Downes; Robert M. Rassel; J. Greco; B. Labelle; S. Sweeney; Kenneth J. Stein; R. Bolam; K. Vaed; B. Omer; Alvin J. Joseph; S. St Onge; J. Dunn

We present IBMs next-generation, cost-performance-optimized BiCMOS technology (BiCMOS 8WL) which combines a state-of-the-art suite of SiGe NPNs, foundry compatible 0.13 μm CMOS, and a rich set of modular passive devices. Intended for a wide variety of supply voltages, the technology, features three different performance NPNs and standard, dual oxide, zero V t , and junction isolated FETs. Optimized for wireless and mixed signal applications, BiCMOS 8WL will enable system on a chip integration for 3G cellular applications.


compound semiconductor integrated circuit symposium | 2005

Collector optimization in advanced SiGe HBT technologies

Qizhi Liu; Bradley A. Orner; Louis D. Lanzerotti; M. Dahlstrom; Wade J. Hodge; M. Gordon; Jeffrey B. Johnson; Michael L. Gautsch; J. Greco; Jay Rascoe; David C. Ahlgren; Alvin J. Joseph; James S. Dunn

With the advancement of the fT/fMAX performance scaling of SiGe HBTs the breakdown voltage (BVCBO/BVCEO) reduces commensurately, causing design related concerns. It is important, therefore, that multiple fT/BVCEO devices be offered in the RF technologies to meet the varying needs of the communication products. Unlike the GaAs technologies, the SiGe BiCMOS technologies are capable of integrating various flavors of fT/BVCEO SiGe HBT devices at a technology node. In this work, we investigate the tradeoff in fT-BVCEO for advanced SiGe HBTs by various collector optimization schemes such as, subcollector dopant species and concentration, epilayer thickness, SIC and other layout techniques.


Journal of The Electrochemical Society | 2002

An Oxynitride Gate Dielectric for Sub-30 Å Complementary Metal Oxide Semiconductor Devices Using Precombustion of Nitrous Oxide

Steven M. Shank; William F. Clark; Wade J. Hodge

Physical and device characteristics of sub-30 A oxynitride gate dielectrics with different nitrogen concentrations are compared. These dielectrics are formed in a standard atmospheric furnace that is in series with a gas precombustion chamber. All gases flow through the precombustion chamber prior to reacting with the wafers. The layers are formed by oxidation of silicon in a N 2 O (nitrous oxide) ambient. By changing the precombustion chamber temperature from 850° to 950°C, the nitrogen content is changed by up to a factor of five as measured by electron spectroscopy for chemical analysis and time-of-flight secondary ion mass spectrometry A change in oxidation growth rate across the temperature range is observed with a decrease in growth rate for higher precombustion temperatures. The nitrogen content also modifies the refractive index of the film such that for a 24 A optical thickness, a physical thickness delta of 2 A is observed, with the thickness at 950°C 2 A less than at 850°C. Complementary metal oxide semiconductor devices on silicon-on-insulator substrates formed with hotter precombustion temperatures exhibit a two-time reduction in leakage current density.


bipolar/bicmos circuits and technology meeting | 2003

A 0.13 m BiCMOS technology featuring a 200/280 GHz (fT/fmax) SiGe HBT

Bradley A. Orner; Qizhi Liu; BethAnn Rainey; Andreas D. Stricker; Peter J. Geiss; Peter B. Gray; Michael J. Zierak; M. Gordon; D. Collins; Wade J. Hodge; C. Willets; Alvin J. Joseph; James S. Dunn; Jae Sung Rieh; S. J. Jeng; E. Eld; G. Freeman; David C. Ahlgren


Archive | 2002

Apparatus and method for forming an oxynitride insulating layer on a semiconductor wafer

D. A. Buchanan; Evgeni Gousev; Carol J. Heenan; Wade J. Hodge; Steven M. Shank; Patrick R. Varekamp


Archive | 2004

Yield improvement in silicon-germanium epitaxial growth

Mark D. Dupuis; Wade J. Hodge; Daniel T. Kelly; Ryan W. Wuthrich


Archive | 2012

SILICON GERMANIUM (SiGe) HETEROJUNCTION BIPOLAR TRANSISTOR (HBT)

Wade J. Hodge; Alvin J. Joseph; Rajendran Krishnasamy; Qizhi Liu; Bradley A. Orner


Archive | 2005

Silicon germanium heterojunction bipolar transistor having interstitial trapping layer in base region

Wade J. Hodge; Alvin J. Joseph; Rajendran Krishnasamy; Qizhi Liu; Bradley A. Orner

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