Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Louis D. Lanzerotti is active.

Publication


Featured researches published by Louis D. Lanzerotti.


bipolar/bicmos circuits and technology meeting | 2001

A 0.18 /spl mu/m BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect

Alvin J. Joseph; D. Coolbaugh; Michael J. Zierak; R. Wuthrich; Peter J. Geiss; Zhong-Xiang He; Xuefeng Liu; Bradley A. Orner; Jeffrey B. Johnson; G. Freeman; David C. Ahlgren; Basanth Jagannathan; Louis D. Lanzerotti; John C. Malinowski; Huajie Chen; J. Chu; Peter B. Gray; Robb Allen Johnson; James S. Dunn; Seshadri Subbanna; Kathryn T. Schonenberg; David L. Harame; R. Groves; K. Watson; D. Jadus; M. Meghelli; A. Rylyakov

A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBMs next generation SiGe BiCMOS production technology targeted at the communications market.


Ibm Journal of Research and Development | 2003

Foundation of rf CMOS and SiGe BiCMOS technologies

James S. Dunn; David C. Ahlgren; Douglas D. Coolbaugh; Natalie B. Feilchenfeld; G. Freeman; David R. Greenberg; Robert A. Groves; Fernando Guarin; Youssef Hammad; Alvin J. Joseph; Louis D. Lanzerotti; Stephen A. St. Onge; Bradley A. Orner; Jae Sung Rieh; Kenneth J. Stein; Steven H. Voldman; Ping-Chuan Wang; Michael J. Zierak; Seshadri Subbanna; David L. Harame; Dean A. Herman; Bernard S. Meyerson

This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal system-on-a-chip (SoC). The paper reviews the process development and integration methodology, presents the device characteristics, and shows how the development and device selection were geared toward usage in mixed-signal IC development.


electrical overstress electrostatic discharge symposium | 2000

Electrostatic discharge characterization of epitaxial-base silicon-germanium heterojunction bipolar transistors

Steven H. Voldman; P. Juliano; J. Schmidt; Robb Allen Johnson; Louis D. Lanzerotti; Alvin J. Joseph; Ciaran J. Brennan; James S. Dunn; David L. Harame; Elyse Rosenbaum; Bernard S. Meyerson

This paper investigates high-current and electrostatic discharge (ESD) phenomena in pseudomorphic epitaxial-base silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) in base-collector, base-emitter, collector-emitter and collector-to-substrate configurations. Transmission line pulse (TLP) and ESD human body model (HBM) wafer-level reliability testing of SiGe HBTs is completed for high-current characterization and evaluation of the ESD robustness of a BiCMOS SiGe technology.


bipolar/bicmos circuits and technology meeting | 1999

A 0.24 /spl mu/m SiGe BiCMOS mixed-signal RF production technology featuring a 47 GHz f/sub t/ HBT and 0.18 /spl mu/m L/sub ett/ CMOS

S. St Onge; David L. Harame; James S. Dunn; Seshadri Subbanna; David C. Ahlgren; G. Freeman; Basanth Jagannathan; J. Jeng; Kathryn T. Schonenberg; Kenneth J. Stein; R. Groves; D. Coolbaugh; Natalie B. Feilchenfeld; Peter J. Geiss; M. Gordon; Peter B. Gray; Douglas B. Hershberger; S. Kilpatrick; Robb Allen Johnson; Alvin J. Joseph; Louis D. Lanzerotti; John C. Malinowski; Bradley A. Orner; Michael J. Zierak

A new base-after-gate integration scheme has been developed to integrate a 47 GHz f/sub t/, 65 GHz F/sub max/SiGe HBT process with a 0.24 /spl mu/m CMOS technology having 0.18 /spl mu/m L/sub eff/ and 5 nm gate oxide. We discuss the benefits and challenges of this integration scheme which decouples the HBT from the CMOS thermal cycles. We also describe the resulting 0.24 /spl mu/m SiGe BiCMOS technology, BiCMOS 6HP, which includes a 7 nm dual gate oxide option and full suite of passive components. The technology provides a high level of integration for mixed-signal RF applications.


international reliability physics symposium | 2004

The influence of heavily doped buried layer implants on electrostatic discharge (ESD), latchup, and a silicon germanium heterojunction bipolar transistor in a BiCMOS SiGe technology

Steven H. Voldman; Louis D. Lanzerotti; W. Morris; L. Rubin

This paper will demonstrate the effect of heavily doped buried layers (HDBL) on electrostatic discharge protection, latchup, and silicon germanium (SiGe) heterojunction bipolar transistors (HBT). Heavily doped buried layers (HDBL) implants, in prior publications, have demonstrated improvements in latchup robustness in low-doped substrate wafer technology. The influence of HDBL on MOSFET ESD protection has also been demonstrated. In this paper, the focus is the influence of HDBL implants on BiCMOS SiGe HBT devices and derivatives from a functionality, ESD and latchup perspective in a BiCMOS SiGe technology as well as relevance to RF and MS CMOS technology. Experimental results will be shown for different heavily doped buried layer implant doses and energies.


international reliability physics symposium | 2002

High current transmission line pulse (TLP) and ESD characterization of a silicon germanium heterojunction bipolar transistor with carbon incorporation

B. Ronan; Steven H. Voldman; Louis D. Lanzerotti; J. Rascoe; D. Sheridan; K. Rajendran

Electrostatic discharge robustness of an epitaxial-base pseudomorphic Silicon Germanium Heterojunction Bipolar Transistor (HBT) device with Carbon incorporation is shown for the first time. Experimental results show that incorporation of Carbon in the base of a SiGe HBT device improves power-to-failure variation by improved control of the base width and base width distribution.


bipolar/bicmos circuits and technology meeting | 2002

High performance, low complexity 0.18 /spl mu/m SiGe BiCMOS technology for wireless circuit applications

Natalie B. Feilchenfeld; Louis D. Lanzerotti; David C. Sheridan; Ryan W. Wuthrich; Peter J. Geiss; D. Coolbaugh; Peter B. Gray; J. He; P. Demag; J. Greco; T. Larsen; V. Patel; Michael J. Zierak; Wade J. Hodge; Jay Rascoe; J. Trappasso; Bradley A. Orner; A. Norris; Douglas B. Hershberger; B. Voegeli; Steven H. Voldman; Robert M. Rassel; V. Ramachandrian; Michael L. Gautsch; Ebenezer E. Eshun; R. Hussain; D. Jordan; S. St Onge; James S. Dunn

High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that offers 3 different breakdown voltage NPNs; with the high performance device achieving F/sub t//F/sub max/ of 60/85 GHz with a 3.0 V BV/sub CEO/. In addition, a full suite of high performance passive devices complement the state-of-the-art SiGe wireless HBTs.


international reliability physics symposium | 2005

The influence of a silicon dioxide-filled trench isolation structure and implanted sub-collector on latchup robustness

Steven H. Voldman; Ephrem G. Gebreselasie; Louis D. Lanzerotti; T. Larsen; Natalie B. Feilchenfeld; S. St Onge; Alvin J. Joseph; James S. Dunn

This paper demonstrates the effect of a new low-cost oxide filled trench isolation structure, and implanted sub-collectors, on the latchup robustness. With scaling and focus on low-cost wireless technology, new technologies are being developed utilizing a shallower oxide-filled trench structure and low-doped implanted sub-collectors. In this paper, the first latchup measurements and corresponding new discoveries are shown, utilizing this new isolation structure and its integration with implanted sub-collectors. This paper compares latchup measurements with the base CMOS technology (e.g. standard dual well p-substrate base technology) to quantify the net improvement. The results are shown with trench isolation only, sub-collector only, and the combined effect of the trench isolation and sub-collector.


bipolar/bicmos circuits and technology meeting | 2004

A low complexity 0.13 /spl mu/ SiGe BiCMOS technology for wireless and mixed signal applications

Louis D. Lanzerotti; Natalie B. Feilchenfeld; D. Coolbaugh; James A. Slinkman; Peter B. Gray; David C. Sheridan; J. Higgins; Wade J. Hodge; M. Gordon; T. Larsen; Michael L. Gautsch; P. Lindgren; R. Murty; Jay Rascoe; K. Watson; T. Stamper; Ebenezer E. Eshun; J. He; K. Downes; Robert M. Rassel; J. Greco; B. Labelle; S. Sweeney; Kenneth J. Stein; R. Bolam; K. Vaed; B. Omer; Alvin J. Joseph; S. St Onge; J. Dunn

We present IBMs next-generation, cost-performance-optimized BiCMOS technology (BiCMOS 8WL) which combines a state-of-the-art suite of SiGe NPNs, foundry compatible 0.13 μm CMOS, and a rich set of modular passive devices. Intended for a wide variety of supply voltages, the technology, features three different performance NPNs and standard, dual oxide, zero V t , and junction isolated FETs. Optimized for wireless and mixed signal applications, BiCMOS 8WL will enable system on a chip integration for 3G cellular applications.


topical meeting on silicon monolithic integrated circuits in rf systems | 2004

Advances in SiGe HBT BiCMOS technology

Alvin J. Joseph; Louis D. Lanzerotti; Xuefeng Liu; David C. Sheridan; Jeffrey B. Johnson; Qizhi Liu; James S. Dunn; Jae Sung Rieh; David L. Harame

Silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) BiCMOS technology has established a strong foothold in the communications marketplace by offering a cost competitive solution for a myriad of products. SiGe BiCMOS technologies currently address various applications ranging from 0.9-77 GHz. At the heart of this success is the ease of integration of a high performance SiGe HBT with state-of-the-art CMOS and passive elements. We present the advances in SiGe BiCMOS technologies and an outlook of future challenges and opportunities.

Researchain Logo
Decentralizing Knowledge