William A. Klaasen

High-reliability fault-tolerant 16-MBit memory chip

A combination of redundant circuits and error-correcting-code circuits have been implemented on a 16-Mb memory chip. The combination of these circuits results in a synergistic fault-tolerance scheme that makes this chip immune to a high level of manufacturing and reliability defects. Experiments have been performed with highly defective chips to test the error-correction capability of this chip and to determine models for the tradeoff between manufacturing yields and reliability. Additional experiments have been done with accelerated protons to investigate the soft-error sensitivity of this chip. Results show no soft-error reliability failures, including those caused by cosmic-particle radiation. Negative binomial distributions were used to evaluate the experiments. The correlation between manufacturing-faults and stress-failures were modeled with a bivariate negative-binomial distribution. >

The evaluation of 16-Mbit memory chips with built-in reliability

Highly defective 16-Mb chips have been stressed under accelerated conditions to test the capability of on-chip error-correction circuits for reliability enhancement. The tradeoff between a manufacturing sort or screen yield and reliability was determined. The soft-error immunity of the trench capacitor technology in conjunction with error correction was also evaluated under accelerated conditions.<<ETX>>