Wolfgang Gustin

Analysis of NBTI Degradation- and Recovery-Behavior Based on Ultra Fast VT-Measurements

We present a new direct VT measurement technique with arbitrary choice of drain voltage and a mus delay (factor of 1000 improvement) after stress. As shown this technique enables a meaningful comparison of data to theory (e.g. DeltaVT measurable as response to stress times from 100mus over 10 decades in time and an analysis of recovery over 11 decades in time) which may lead to a better understanding of NBTI. A fast precursor due to bulk trapping was found to significantly influence degradation slopes for all times. Based on a physical model - standard reaction/diffusion model plus fast bulk trapping -with just 3 fit parameters experimental degradation can be well modelled and degradation slopes <frac14 as well as > frac14 (both reported in literature) can be explained. A lifetime extrapolation based on this physical model is superior to the common straight line fit. There is no satisfying agreement of recovery data with reaction/diffusion theory. Further experimental and theoretical work is going to be needed

The statistical analysis of individual defects constituting NBTI and its implications for modeling DC- and AC-stress

The physical origin of the Negative Bias Temperature Instability (NBTI) is still under debate. In this work we analyze the single defects constituting NBTI. We introduce a new measurement technique stimulating a charging of these defects. By employing a statistical analysis of many stochastic stimulation processes of the same defect we are able to determine the electric field and the temperature dependence of these defects with great precision. Based on our experiments we present and verify a new, physics-based, quantitative model allowing a precise prediction of NBTI degradation and recovery. This model takes the stress history into account and also provides a prediction for degradation due to AC-NBTI and an understanding of the special features seen in conjunction with AC-NBTI.

Simultaneous Extraction of Recoverable and Permanent Components Contributing to Bias-Temperature Instability

Measuring the degradation of modern devices subjected to bias temperature stress has turned out to be a formidable challenge. Interestingly, measurement techniques such as fast- Vth, on-the-fly ID,lin, and charge-pumping give quite different results. This has often been explained by the inherent recovery in non-on-the-fly techniques. Still, all these techniques deliver important information on the degradation and recovery behavior and a rigorous understanding linking these results is still missing. Based on our detailed studies of the recovery, we propose a new measurement technique which allows the simultaneous extraction of two distinctly different components, a fast universally recovering component and a slow, nearly permanent component.

Understanding and modeling AC BTI

We present a model for AC NBTI which is based on capture and emission of charges in and out of oxide border traps. Capture and emission time constants of these traps are widely distributed from &#60;µs to >105s and have been experimentally determined. The model gives a good quantitative understanding of experimental data from alternating stress / recovery sequences. It also provides a physical understanding of all the special features seen in AC NBTI independently of technology parameters.

A Comparison of Very Fast to Very Slow Components in Degradation and Recovery Due to NBTI and Bulk Hole Trapping to Existing Physical Models

A new measuring technique with a 1mus measuring delay and a direct VT determination has been employed. The response to stress times as short as 100 mus to 105 has been studied as well as recovery over 12 decades in time. These experimental data allow a meaningful comparison to theory. Degradation data cut be precisely fitted to a simple physical model with 3 parameters thus enabling a reliable lifetime prediction from stress times below 104s.

Effects of inhomogeneous negative bias temperature stress on p-channel MOSFETs of analog and RF circuits

The effect of inhomogeneous negative bias temperature stress (NBTS) applied to p-MOS transistors under analog and RF CMOS operating conditions is investigated. Experimental data of a 0.18 and 0.25 μm standard CMOS process are presented and an analytical model is derived to physically explain the effect of stress on the device characteristics. The impact of inhomogeneous NBTS on device lifetime is considered and compared to the homogeneous case.

On the impact of the NBTI recovery phenomenon on lifetime prediction of modern p-MOSFETs

The NBTI recovery phenomenon leads to a fast reduction of the stress induced electrical device parameter degradation after end of stress. Delay times between device-stress and -characterization within NBTI-experiments affect the measurement values of degradation. This work discusses the impact of these delays on lifetime prediction for technology qualifications. For this reason we investigate delay times from 1mus up to 60s and stress times from 100ms up to 250000s. A correlation between stress time, delay time induced recovery and error in predicted lifetime is elaborated for the first time. Furthermore we give simple guidelines for measurement requirements and essential stress times for accurate lifetime evaluations

A novel multi-point NBTI characterization methodology using Smart Intermediate Stress (SIS)

In recent literature several measurement methods were introduced to characterize the Vth-degradation due to NBTI considering the recovery phenomenon. To our knowledge each method has a severe problem or at least a significant disadvantage. Either there are long delay times, the accuracy is not satisfactory or it is not possible to implement the method with customary equipment. A compromise is to perform a one point measurement in the subthreshold region and calculate Vth based on the assumption that the subthreshold slope is not affected by NBTI. In this paper we disprove the universality of this assumption. Vth determination using a one point measurement can lead to imprecise values. This extraction method disregards changes of the subthreshold slope due to NBTI, however a change of the slope impacts the extracted Vth. We clearly demonstrate this effect with our measurements. We introduce a new smart Vth extraction methodology offering both shortest possible delay times with customary equipment and consideration of NBTI-impact on subthreshold slope.

A Study of NBTI and Short-Term Threshold Hysteresis of Thin Nitrided and Thick Non-Nitrided Oxides

Negative bias temperature instability (NBTI) degradation and recovery have been investigated for 7-50-nm non-nitrided oxides and compared to thin 1.8- and 2.2-nm nitrided oxides from a dual work function technology. A wide regime of stress fields from 2.5 to 10 MV/cm has been covered. Thermal activation has been studied for temperatures from 25 degC to 200 degC. The NBTI effect for the nitrided oxide is larger than for non-nitrided oxides. The percentage of threshold shift V th which is ldquolostrdquo during a long measurement delay-which is the quantity leading to curved V th versus stress-time curves and to errors in extrapolated lifetimes-is about equal for nitrided or thick non-nitrided oxides. The fraction of recovered V th is strongly dependent on stress time but only weakly dependent on stress field. Recovery in thick oxides leads to exactly the same problems as for non-nitrided oxides, and clearly, a fast measurement method is needed. The effect of short-term threshold shifts has been studied for extremely short stress times down to 200 ns.

Comprehensive analysis of the degradation of a lateral DMOS due to hot carrier stress

The drift of electrical parameters due to the injection of high energetic “hot” carriers into the oxide during operation is a serious concern regarding the reliability of lateral double-diffused transistors (LDMOSFETs). This is amplified by down-scaling, increasing the electric field in the drift region and thus the rate of hot carrier generation. As a consequence, profound knowledge of the hot carrier degradation is required for future device designs and the modeling of hot carrier degradation in various application modes. In this work, a comprehensive analysis of the hot carrier degradation at elevated drain voltage in an n-type LDMOSFET is presented. Photo-emission microscopy is used to detect the position of the impact ionization spot. The results are shown to be in good agreement with device simulation using the drift diffusion model and allow explaining the gate-voltage dependence of the degradation of Ron. By Monte-Carlo simulation, the energy and spatial distribution of hot electrons and holes impinging on the oxide interface of an LDMOSFET is calculated.