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Dive into the research topics where Yaocheng Liu is active.

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Featured researches published by Yaocheng Liu.


symposium on vlsi technology | 2007

Strained Si Channel MOSFETs with Embedded Silicon Carbon Formed by Solid Phase Epitaxy

Yaocheng Liu; Oleg Gluschenkov; Jinghong Li; Anita Madan; Ahmet S. Ozcan; Byeong Y. Kim; Thomas W. Dyer; Ashima B. Chakravarti; Kevin K. Chan; Christian Lavoie; Irene Popova; Teresa Pinto; Nivo Rovedo; Zhijiong Luo; Rainer Loesing; William K. Henson; Ken Rim

Current drive enhancement is demonstrated in sub-40 nm NFETs with strained silicon carbon (Si:C) source and drain using a novel solid-phase epitaxy (SPE) technique for the first time. The very simple process uses no recess etch or epi deposition steps, adds minimal process cost, and can be easily integrated into a standard CMOS process. With a record high 1.65 at% substitutional C concentration in source and drain, 615 MPa uniaxial tensile stress was introduced in the channel, leading to a 35% improvement in electron mobility and 6% and 15% current drive increase in sub-40 and 200 nm channel length devices respectively.


Archive | 2012

Structure and method for mobility enhanced mosfets with unalloyed silicide

Yaocheng Liu; Dureseti Chidambarrao; Oleg Gluschenkov; Judson R. Holt; Renee T. Mo; Kern Rim


Archive | 2010

SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE

Yaocheng Liu; Shreesh Narasimha; Katsunori Onishi; Kern Rim


Archive | 2008

Localized strain relaxation for strained Si directly on insulator

Yaocheng Liu; Devendra K. Sadana; Kern Rim


Archive | 2007

N-channel mosfets comprising dual stressors, and methods for forming the same

Jinghong H. Li; Yaocheng Liu; Zhijiong Luo; Anita Madan; Nivo Rovedo


Archive | 2017

Semiconductor device and method of manufacture

Oleg Gluschenkov; Sameer H. Jain; Yaocheng Liu


Archive | 2007

Stressed soi fet having doped glass box layer

Dureseti Chidambarrao; William K. Henson; Yaocheng Liu


Archive | 2006

SEMICONDUCTOR STRUCTURE INCLUDING MULTIPLE STRESSED LAYERS

William K. Henson; Dureseti Chidambarrao; Yaocheng Liu


Archive | 2006

OPTIMIZED DEEP SOURCE/DRAIN JUNCTIONS WITH THIN POLY GATE IN A FIELD EFFECT TRANSISTOR

Dureseti Chidambarrao; Yaocheng Liu; Kern Rim


Archive | 2007

Method of forming stressed SOI FET having doped glass box layer using sacrificial stressed layer

Dureseti Chidambarrao; William K. Henson; Yaocheng Liu

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