Yoshiaki Toyoda

A Simple Low Cost Monolithic Transformer for High-Voltage Gate Driver Applications

A simple low cost monolithic 3D through-silicon-via coreless transformer is designed and fabricated for high-voltage gate driver applications. The transformer comprises the primary coil embedded in the bottom layer of a Si substrate and the secondary coil built on the front-side of the substrate. Compared with conventional transformers with both coils built on the front-side or at the backside, the proposed structure has the advantages of area-saving and cost-effectiveness. A coreless transformer with primary, secondary, and mutual inductances of 260, 280, and 112 nH, respectively, is fabricated in a small area of 2 mm2. It achieves both high galvanic isolation and satisfactory voltage gain (0.41 from 4 to 45 MHz).

A New Trench Power MOSFET With an Inverted L-Shaped Source Region

A new trench power MOSFET with an inverted L-shaped source region is proposed and experimentally demonstrated. The fabricated new device has a breakdown voltage of 54 V. The avalanche energy absorption of the new device at unclamped inductive switching is 2.1 times that of the fabricated conventional trench power MOSFET. This is due to the minimized n+-source/p-body junction in the structure. Moreover, the specific on-resistance of the new device is reduced by 30% due to the smaller pitch. The new device is very promising for automotive electric power steering applications.

A novel 3D TSV transformer technology for digital isolator gate driver applications

In this paper, a novel 3D TSV (Through-Silicon-Via) transformer technology for power system-on-chip applications is proposed and demonstrated experimentally. The transformer used in the power system features a galvanic isolation of > 4 kV and a voltage gain of > -3 dB from 10 MHz to 100 MHz. It can be embedded in the bottom layer of a silicon substrate and sandwiched between system circuitries for ultimate area efficiency and the smallest possible form factor compared with other conventional on-silicon approaches. A digital isolator gate driver built using this transformer technology is achieved, and successful signal transfer is clearly illustrated.

UIS Analysis and Characterization of the Inverted L-Shaped Source Trench Power MOSFET

In this paper, the unclamped inductive switching (UIS) behavior of an inverted L-shaped source trench power MOSFET is numerically analyzed and experimentally characterized. The measured avalanche energy absorption at UIS of the new trench power MOSFET is 2.1 times that of the conventional trench power MOSFET. This is explained by numerical simulation, which shows that the voltage drop across the emitter/base junction in the parasitic bipolar junction transistor of the new structure is smaller than that of the conventional structure. The influence of structural and device size variation of the new trench power MOSFET on UIS performance is also investigated. Results show that the avalanche current density at UIS is a strong function of the p+-region width and the device size. Furthermore, the effect becomes very significant as the device size becomes very small.

60V-class power IC technology for an intelligent power switch with an integrated trench MOSFET

New 60V-class intelligent power switch (IPS) technology implementing a vertical trench MOSFET has been developed for automotive applications. We have realized the method to integrate a 60V-class vertical trench MOSFET with high voltage surge robustness and 5V- and 60V-class lateral planar MOSFETs on one chip. The integrated vertical trench MOSFET is designed by 0.35μm-rule in order to reduce its specific on-resistance (Ron·A). As a result, our integrated vertical trench MOSFET has the Ron·A below 0.6mΩ·cm2 which is about 40% Ron·A of the vertical planar MOSFET integrated in the conventional IPS. This paper reports our newly developed 60V-class power IC technology for the IPS.