Yu-Hwan Ro

A 90 nm 1.8 V 512 Mb Diode-Switch PRAM With 266 MB/s Read Throughput

A 512 Mb diode-switch PRAM has been developed in a 90 nm CMOS technology. The vertical diode-switch using the SEG technology has achieved minimum cell size and disturbance-free core operation. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are proposed. The 512 Mb PRAM has achieved read throughput of 266 MB/s through the proposed schemes. The write throughput was 0.54 MB/s in internal x2 write mode, and increased to 4.64 MB/s with x16 accelerated write mode at 1.8 V supply.

A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput

A 512Mb diode-switch PRAM is developed in a 90nm CMOS technology. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are described. Through these schemes, the PRAM achieves read throughput of 266MB/S and maximum write throughput of 4.64MB/S with a 1.8V supply.

A 0.1/spl mu/m 1.8V 256Mb 66MHz Synchronous Burst PRAM

A 256Mb PRAM featuring synchronous burst read operation is developed. Using a charge-pump system, write performance is characterized at 1.8V supply. Measured initial read access time and burst-read access time are 62ns and 10ns, respectively. The maximum write throughput is 3.3MB/S