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Featured researches published by Yushu Wang.


Corrosion | 2015

Corrosion Behavior of Austenitic and Duplex Stainless Steels in Thiosulfate- and Chloride-Containing Environments

Yushu Wang; Preet M. Singh

The effect of thiosulfate concentration on the corrosion behavior of duplex stainless steels S32101 and S31803 was investigated in thiosulfate- and chloride-containing environments, of relevance to the paper machine environments and other chemical industrial processes. Electrochemical methods including cyclic potentiodynamic polarization and potentiostatic scratch test were used to study the localized corrosion behavior of these alloys. Corrosion behavior of tested duplex stainless steels was compared with austenitic stainless steels S30403 and S31603, which are typically used in relevant industrial equipment, like paper machines. Cyclic potentiodynamic polarization results indicated that the presence of thiosulfate ions considerably lowered the repassivation potential of all stainless steels tested. In presence of thiosulfate ions, different grades of duplex stainless steels behaved differently. S31803, with the highest molybdenum and chromium content, was the most resistant to pitting corrosion among th...


electronic components and technology conference | 2011

Solution-derived electrodes and dielectrics for low-cost and high-capacitance trench and Through-Silicon-Via (TSV) capacitors

Yushu Wang; Shu Xiang; P. Markondeya Raj; Himani Sharma; Byron Williams; Rao Tummala

This paper explores and demonstrates a novel technique to conformally coat solution-derived electrodes and dielectric films over Through-Silicon-Via (TSV) or Through-Silicon Trench (TST) structures. In this technique, precursor solution for electrode or dielectric coatings is dispensed on the top of a TSV wafer and infiltrated through the via by creating a pressure gradient. Two material systems used in capacitors, Lanthanum Nickel Oxide (LNO) as electrode and Lead Zirconate Titanate (PZT) as dielectric, were deposited on the TSV surfaces using this technique. SEM cross-section analysis showed that the vacuum-infiltration can be extended to conformally coat on trenches with aspect ratios of greater than 5. A planar capacitor with density of 3 μF/cm2 and low leakage was fabricated to demonstrate the material compatibility. Using this technique, a trench capacitor device can be fabricated with an all-solution coating process, without involving any expensive deposition tools. This can thus eliminate costly platinum electrodes that are frequently required to yield high permittivity PZT films. This technique can also address the through-put limitations of todays conformal deposition technologies such as sputtering, Chemical Vapor Deposition (CVD) and Atomic Layer Deposition (ALD). The tool and process can also be applied to other 3D silicon structures where conformal ceramic coatings are needed.


international conference on nanotechnology | 2011

Thin film power components with nanoscale electrodes and conformal dielectrics

P. Markondeya Raj; Himani Sharma; Kanika Sethi; Yushu Wang; Venky Sundaram; Rao Tummala

Achieving high capacitance densities with capacitors integrated in thin film form has been a major challenge for the past few decades. Nanocapacitors utilizing nanostructured electrodes and conformal nanodielectrics provide unique opportunities to enhance capacitance volumetric efficiency by 5–10X compared to the state-of-the-art tantalum capacitors. This paper reports the first proof-of-concept demonstration of a novel silicon-compatible high-density capacitor technology. The key novelty stems from the tremendous enhancement in surface area from porous copper nanoelectrodes and conformal alumina dielectric on such nanoelectrodes. Alternative organic package compatible high-density capacitors using etched foils is also presented. Both approaches show substantial improvements in capacitance densities compared to traditional integrated thin film or trench capacitors.


IEEE Transactions on Components, Packaging and Manufacturing Technology | 2013

All-Solution Thin-film Capacitors and Their Deposition in Trench and Through-Via Structures

Yushu Wang; Shu Xiang; Markondeya Raj Pulugurtha; Himani Sharma; Byron Williams; Rao Tummala

Thin integrated passive devices (IPDs) will play a critical role in the miniaturization of future high-performance electronic and bioelectronic systems. Silicon-based capacitors are currently manufactured with expensive processes such as sputtering and atomic layer deposition. Solution-deposited electrodes and dielectrics in trench and through-via structures provide alternative low-cost routes. Two solution-deposition techniques, spin-coating and vacuum infiltration, are investigated in this paper. A representative all-solution-derived thin-film capacitor consisting of sol-gel lanthanum nickel oxide (LNO) as the electrode, and sol-gel lead zirconate titanate as the dielectric thin-film is demonstrated in the first part of this paper. The role of barriers in reducing leakage currents is studied using three electrode systems: LNO/Si, LNO/ZrO2/Si, and LNO/Pt/Ta/Si. Capacitors with LNO electrodes directly deposited on naturally oxidized silicon resulted in higher leakages, more defects and a lower yield. The results show that the zirconia barrier suppresses the leakage current in the dielectric. The second part of this paper describes sol-gel films deposited in the through-via and trench surfaces to demonstrate the sol-gel conformal coating technique. Scanning electron microscopy cross-section analysis shows that the vacuum infiltration conformally coated through-vias. These solution deposition techniques may have the potential to fabricate IPD capacitors at low cost.


electronic components and technology conference | 2011

Co-W as an advanced barrier for intermetallics and electromigration in fine-pitch flipchip interconnections

Dibyajat Mishra; P. Markondeya Raj; Sadia Khan; Nitesh Kumbhat; Yushu Wang; Suman Addya; Raghuram V. Pucha; Abhishek Choudhury; Venky Sundaram; Rao Tummala

The trend towards thinner packages with embedded active components in case of RF modules, and higher I/O densities in case of multicore processors or 3D ICs, are pushing interconnection technologies to its fundamental limits. The limitations of traditional solder bump technologies in terms of its fatigue resistance, current-handling, electromigration and thermomigration resistance has shifted the interconnection focus to advanced thick copper bump UBMs with solder caps. However, even these interconnections fail to meet thermo-mechanical and electrical reliability requirements for fine-pitch flipchip interconnections at high current densities where electromigration becomes a major concern. This paper explores Co-W as an advanced barrier between copper bump and solder cap for fine-pitch flipchip technology to improve electromigration resistance. By suppressing the intermetallic growth and controlling electromigration, the novel barrier is expected to enhance the current-handling and thermomechanical reliability. In a systematic experimental study, Cu-Sn diffusion and intermetallic growth rate of this new Cu-Co-W-Sn-Ag approach are compared with that of Cu-Sn-Ag with XPS depth-profiling and cross-section analysis using SEM and EDS. Based on the analysis, the benefits of Co-W as a solder barrier for fine-pitch flipchip interconnections at high current densities is presented


Corrosion | 2016

Effect of Thiosulfate on Metastable Pitting of 304L and S32101 in Chloride- and Thiosulfate-Containing Environment

Yushu Wang; Gaoxiang Wu; Liang He; Preet M. Singh


Engineering Failure Analysis | 2015

Field studies of steam oxidation behavior of austenitic heat-resistant steel 10Cr18Ni9Cu3NbN

Zhiyuan Liang; Qinxin Zhao; Preet M. Singh; Yungang Wang; Yuxin Li; Yushu Wang


Oxidation of Metals | 2015

High Temperature Oxidation of Newly Developed Alloy 282 in the Flowing-Air and Steam Condition at 900–1100 °C

Zhiyuan Liang; Preet M. Singh; Qinxin Zhao; Yushu Wang


ECTC | 2011

Solution-Derived Electrodes and Dielectrics for Low-Cost and High-Capacitance Trench and Through-Silicon-Via (TSV) Capacitors

Yushu Wang; Xiang Shu; P. Markondeya Raj; Himani Sharma; Byron J. Williams; Rao Tummala


Archive | 2013

Package-Compatible High-Density Nano-Scale Capacitors with Conformal Nano-Dielectrics

Himani Sharma; P. Markondeya Raj; Parthasarathi Chakraborti; Yushu Wang; Rao Tummala

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Rao Tummala

Georgia Institute of Technology

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Preet M. Singh

Georgia Institute of Technology

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P. Markondeya Raj

Georgia Institute of Technology

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Himani Sharma

Georgia Institute of Technology

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Venky Sundaram

Georgia Institute of Technology

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Abhishek Choudhury

Georgia Institute of Technology

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Dibyajat Mishra

Georgia Institute of Technology

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Nitesh Kumbhat

Georgia Institute of Technology

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Raghuram V. Pucha

Georgia Institute of Technology

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Sadia Khan

Georgia Institute of Technology

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