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Dive into the research topics where A. Raghavan is active.

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Featured researches published by A. Raghavan.


international microwave symposium | 2001

A highly integrated transceiver module for 5.8 GHz OFDM communication system using multi-layer packaging technology

Kyutae Lim; Ade Obatoyinbo; A. Sutono; Sudipto Chakraborty; Chang-Ho Lee; Edward Gebara; A. Raghavan; Joy Laskar

A highly integrated transceiver module for 5.8 GHz OFDM communication system is presented. The antenna and filter are directly fabricated on the module using multi-layer packaging technology in order to reduce size and interconnection losses. A cavity backed patch antenna with a vertical feed and an embedded 3D filter have been designed and integrated on the package using a low-temperature cofired ceramic (LTCC) process. RF functional blocks including PA, LNA, mixers and VCO are developed using GaAs-based MMICs and are attached on the surface of the LTCC board. RF blocks are vertically stacked and connected through via structures. The specifications of the functional blocks have been determined and verified through system simulations based on the IEEE 802.11a standard. The total size of the module is 14/spl times/19/spl times/2 mm/sup 3/. Measurement and simulation results of the components and the module are also presented.


international microwave symposium | 2002

A 2.4 GHz high efficiency SiGe HBT power amplifier with high-Q LTCC harmonic suppression filter

A. Raghavan; Deukhyoun Heo; M. Maeng; A. Sutono; Kyutae Lim; Joy Laskar

We present a 2.4 GHz SiGe HBT power amplifier integrated with a harmonic suppression filter implemented in a high-Q multilayer low-temperature cofired ceramic (LTCC) substrate at the output. The power amplifier delivers a power of up to 27.5 dBm with a maximum power-added efficiency (PAE) of 47%. It has a power output of 27 dBm at an input power of 0 dBm with a PAE of 45%. The second and third harmonics are -44 dBc and -49 dBc, respectively, at this operating point. The power amplifier exhibits a linear gain of 35 dB and operates at a supply voltage of 3.3 V. To the best of our knowledge, this represents the best reported performance of a SiGe HBT power amplifier at 2.4 GHz and is comparable to performance previously achieved only with GaAs-based processes. The harmonic suppression filter and output match network have been implemented completely in LTCC without the use of external discrete components.


international microwave symposium | 2000

Direct extraction method for internal equivalent circuit parameters of HBT small-signal hybrid-/spl pi/ model

Youngsuk Suh; E. Seok; J.-H. Shin; B. Kim; Deukhyoun Heo; A. Raghavan; Joy Laskar

We present a novel and robust direct extraction method for the hybrid-/spl pi/ equivalent circuit model of a HBT. This method can accurately resolve the most important internal parameters from the measured S-parameters, and is not sensitive to the values of parasitic parameters. We derive some analytical expressions for the parameters. These analytical expressions for the hybrid-/spl pi/ equivalent circuit of the HBT ensure robust, fast, and reliable parameter extraction.


Archive | 2007

Modeling and design techniques for RF power amplifiers

A. Raghavan; N. Srirattana; Joy Laskar

Achieve higher levels of performance, integration, compactness, and cost-effectiveness in the design and modeling of radio-frequency (RF) power amplifiers RF power amplifiers are important components of any wireless transmitter, but are often the limiting factors in achieving better performance and lower cost in a wireless communication system—presenting the RF IC design community with many challenges. The next-generation technological advances presented in this book are the result of cutting-edge research in the area of large-signal device modeling and RF power amplifier design at the Georgia Institute of Technology, and have the potential to significantly address issues of performance and cost-effectiveness in this area.


radio and wireless symposium | 2003

A high-efficiency multistage Doherty power amplifier for WCDMA

N. Srirattana; A. Raghavan; Deukhyoun Heo; Phillip E. Allen; Joy Laskar

A comprehensive analysis of multistage Doherty amplifier, which can be used to achieve higher efficiency at great back-off compared to the classical Doherty amplifier, is presented. A novel set of design equations for a generalized N-stage Doherty amplifier is introduced. For the first time, this technique is applied to the design of a WCDMA power amplifier (PA). The designed PA meets WCDMA requirements, and exhibit a power-added efficiency (PAE) of 34.5% at 6 dB back-off and 16.9% at 12 dB back-off. These PAEs are 2 times and 4 times better, respectively, than that of a single stage linear PA at the same back-off levels. The PA is capable of delivering up to 28.6 dBm of output power, and has a maximum adjacent channel power leakage ratio of -38 dBc and -51 DBc at 5 and 10 MHz offset, respectively. To the best of the authors knowledge, these represent the best reported results of a Doherty amplifier for WCDMA application in the 1.95 GHz band, to date.


international microwave symposium | 2004

A new analytical scalable substrate network model for RF MOSFETs

N. Srirattana; Deukhyoun Heo; H.-M. Park; A. Raghavan; P.E. Allen; Joy Laskar

In this work, the substrate parameter scalability of multi-finger RF MOSFET is analyzed and modeled for a broad range of device periphery from 200 /spl mu/m up to 6 mm. For the first time, a new analytical substrate network model based on device geometry of 0.4-/spl mu/m thick-oxide NMOS transistors with ring-shaped substrate contact surrounding the device is proposed. The effect of substrate coupling from the drain and source junctions to the top and bottom substrate contacts has not been considered previously in the conventional MOSFET substrate modeling. It is found that this effect dominates the total substrate resistance as device size increases. The new model approximates the distributed substrate coupling effect into vertical and horizontal directions (from the drain and source junctions to the top and bottom substrate contacts, and to the side substrate contacts), and can accurately predict the substrate parameters for a broad range of device periphery. This approximation simplifies the modeling complexity of the distributed substrate coupling and enables the direct calculation of each substrate component from device geometry with great accuracy. The newly proposed analytical substrate model is essential for developing a scalable MOSFET model for high frequency applications.


IEEE Journal of Solid-state Circuits | 2003

Direct extraction of an empirical temperature-dependent InGaP/GaAs HBT large-signal model

A. Raghavan; S. Venkataraman; B. Banerjee; Youngsuk Suh; Deukhyoun Heo; Joy Laskar

A new empirical InGaP/GaAs heterojunction bipolar transistor (HBT) large-signal model including self-heating effects is presented. The model accounts for the inherent temperature dependence of the device characteristics due to ambient-temperature variation as well as self-heating. The model is accompanied by a simple extraction process, which requires only dc current-voltage (I-V) and multibias-point small-signal S-parameter measurements. All the current-source model parameters, including the self-heating parameters, are directly extracted from measured forward I-V data at different ambient temperatures. The distributed base-collector capacitance and base resistance are extracted from measured S-parameters using a new technique. The extraction procedure is fast, accurate, and inherently minimizes the average squared-error between measured and modeled data, thereby eliminating the need for further optimization following parameter extraction. This modeling methodology is successfully applied to predict the dc, small-signal S-parameter, and output fundamental and harmonic power characteristics of an InGaP/GaAs HBT, over a wide range of temperatures.


radio frequency integrated circuits symposium | 2001

A GaAs HBT 5.8 GHz OFDM transmitter MMIC chip set

A. Raghavan; Edward Gebara; Chang-Ho Lee; Sudipto Chakraborty; D. Mukherjee; J. Bhattacharjee; Deukhyoun Heo; Joy Laskar

This paper presents a GaAs/AlGaAs HBT transmitter MMIC chip set consisting of a power amplifier, a mixer and a voltage-controlled oscillator (VCO) for 5.8 GHz OFDM applications. The performance of the transmitter in an OFDM system is investigated by means of envelope co-simulation of the circuit in an OFDM transmitter simulation platform that conforms to the IEEE 802.11a wireless LAN standard. To the best of our knowledge, this research represents the first reported implementation of an OFDM transmitter in GaAs HBT technology.


international microwave symposium | 2001

Direct extraction and modeling method for temperature dependent large signal CAD model of Si-BJT

Youngsuk Suh; Deukhyoun Heo; A. Raghavan; Edward Gebara; S. Nuttnick; Kyutae Lim; Joy Laskar

A new Si-BJT CAD model and the corresponding direct extraction method are presented. An exact analytical expression for the total distributed base resistance is developed. Several exact analytical solutions for the thermal resistance and the current source models are derived. The model based on the new analytical expressions can predict the measured data minimizing the least square errors between measured and modeled data. This current source modeling method requires no optimization or trimming process. The parameters are extracted self consistently to minimize the error in modeling. We applied this method to a 5 finger 0.4/spl times/20 /spl mu/m/sup 2/ Si-BJT and verified the model over the temperature range 273-333/spl deg/K and up to 15 GHz. The model shows good correlation with the measured data.


international conference on vlsi design | 2003

Development of 2.4 GHz RF transceiver front-end chipset in 0.25 /spl mu/m CMOS

Saikat Sarkar; Padmanava Sen; A. Raghavan; Sudipto Chakarborty; Joy Laskar

This paper presents the design of a 2.4 GHz RF transceiver front-end chipset in 0.25 /spl mu/m CMOS technology. The designed chipset includes a fully monolithic receiver front end consisting of LNA, mixer and two variations of power amplifiers (PA), one for high output power and efficiency, and the other for good linearity. The integrated receiver provides simulated voltage gain of 22.7 dB, NF of 6.6 dB, IIP3 of -15.5 dBm, and consumes 21 mW power from a 1.5 volt power supply. The high-efficiency versions utilize class F/inverse class F matching to achieve power added efficiency (PAE) of over 50% with an output power of up to 350 mW. The linear PA utilizes differential class B push pull architecture and provides an IM3 less than -35 dB with a 22.5 dBm output power and power added efficiency (PAE) of 20%. The circuits are under fabrication in National Semiconductors 0.25 /spl mu/m CMOS facility and the measurement results will be presented in the final version.

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Joy Laskar

Georgia Institute of Technology

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Deukhyoun Heo

Washington State University

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N. Srirattana

Georgia Institute of Technology

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Edward Gebara

Georgia Institute of Technology

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Kyutae Lim

Georgia Institute of Technology

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Phillip E. Allen

Georgia Institute of Technology

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A. Sutono

Georgia Institute of Technology

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M. Maeng

Georgia Institute of Technology

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