Bruce J. Chamberlin

Extraction of /spl epsiv//sub r/(f) and tan/spl delta/(f) for printed circuit board insulators up to 30 GHz using the short-pulse propagation technique

In this paper, the self-consistent, frequency-dependent dielectric constant epsivr(f) and dielectric loss tandelta(f) of several materials are determined over the range 2 to 30 GHz using a short-pulse propagation technique and an iterative extraction based on a rational function expansion. The simple measurement technique is performed in the time domain on representative printed circuit board wiring. Broadband, fully causal transmission-line models based on these results are generated up to 50 GHz for card wiring using low loss materials including BT, Nelco N4000-13, and Nelco N4000-13SI. Simulation and modeling results highlight the need for the accurate frequency-dependent dielectric loss extraction. Signal propagation based on these results shows very good agreement with measured step and pulse time-domain excitations and provides validation of the measurement and model generation technique

Prediction of Losses Caused by Roughness of Metallization in Printed-Circuit Boards

In this paper, the effect of metal roughness on the total loss, the extracted tandelta, and signal integrity of typical interconnections found in printed-circuit boards is extracted from measurements on three different materials. The differing characteristics of the roughened metal cross sections are highlighted, and a simplified, practical, 2-D, causal, broadband modeling methodology is shown

First- and second-level packaging of the z990 processor cage

In this paper, we describe the challenging first- and second-level packaging technology of a new system packaging architecture for the IBM eServerTM z990. The z990 dramatically increases the volumetric processor density over that of the predecessor z900 by implementing a super-blade design comprising four node cards. Each blade is plugged into a common center board, and a blade contains the node with up to sixteen processor cores on the multichip module (MCM), up to 64 GB of memory on two memory cards, and up to twelve self-timed interface (STI) cables plugged into the front of the node. Each glass-ceramic MCM carries 16 chips dissipating a maximum power of 800 W. In this super-blade design, the packaging complexity is increased dramatically over that of the previous zSeries® eServer z900 to achieve increased volumetric density, processor performance, and system scalability. This approach permits the system to be scaled from one to four nodes, with full interaction between all nodes using a ring structure for the wiring between the four nodes. The processor frequencies are increased to 1.2 GHz, with a 0.6-GHz nest with synchronous double-data-rate interchip and interblade communication. This data rate over these package connections demands an electrical verification methodology that includes all of the different relevant system components to ensure that the proper signal and power distribution operation is achieved. The signal integrity analysis verifies that crosstalk limits are not exceeded and proper timing relationships are maintained. The power integrity simulations are performed to optimize the hierarchical decoupling in order to maintain the voltage on the power distribution networks within prescribed limits.

First- and second-level packaging for the IBM eServer z900

This paper describes the system packaging of the processor cage for the IBM eServer z900. This server contains the worlds most complex multichip module (MCM), with a wiring length of 1 km and a maximum power of 1300 W on a glass-ceramic substrate. The z900 MCM contains 35 chips comprising the heart of the central electronic complex (CEC) of this server. This MCM was implemented using two different glass-ceramic technologies: one an MCM-D technology (using thin film and glass-ceramic) and the other a pure MCM-C technology (using glass-ceramic) with more aggressive wiring ground rules. In this paper we compare these two technologies and describe their impact on the MCM electrical design. Similarly, two different board technologies for the housing of the CEC are discussed, and the impact of their electrical properties on the system design is described. The high-frequency requirements of this design due to operating frequencies of 918 MHz for on-chip and 459 MHz for off-chip interconnects make a comprehensive design methodology and post-routing electrical verification necessary. The design methodology, including the wiring strategy needed for its success, is described in detail in the paper.

Comparison of time- and frequency domain measurement results for product related card and MCM transmission lines up to 65 GHz

Transmission line models and material parameters are extracted from time and frequency domain measurements for product related low loss card and ceramic MCM test line structures up to 65GHz. All measured results are compared to results as obtained from field calculations showing the advantages and limitations of the different methods on product driven test vehicles.

Losses caused by roughness of metallization in printed-circuit boards

In this paper the effect of metal roughness on the total loss, the extracted tan /spl delta/, and signal integrity of typical interconnections found in printed-circuit boards is extracted from measurements on three different materials. The differing characteristics of the roughened metal cross sections are highlighted, and a simplified, practical, two-dimensional, causal, broadband modeling methodology is shown.

Extraction of /spl epsiv/(f) and tan /spl delta/(f) for BT insulator up to 30 GHz using the short-pulse propagation technique

The self-consistent frequency-dependent dielectric constant, /spl epsiv//sub r/(f), and dielectric loss, tan/spl delta/(f), are determined over the range 2 to 30 GHz using a short-pulse propagation technique and an iterative extraction based on a rational function expansion. Simulations of signal propagation on printed circuit board wiring using transmission-line models based on these results show very good agreement with measured step and pulse time-domain excitations.

Determination of transmission line parameters in time- and frequency domain for product related packaging structures

Special test vehicles have been built for first and low loss second level packages including product related test line structures. The characteristic transmission line parameters were measured in the time and in the frequency domain in a wide frequency range. Advantages and limitations of the different methods are discussed by comparing the obtained results.