Duy-Loan T. Le

System including a data processor, a synchronous dram, a peripheral device, and a system clock

Circuit for driving conductive line and testing conductive line for current leakage

Array block level redundancy with steering logic

Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock

Fuse selectable timing signals for internal signal generators

Testing and repair of wide I/O semiconductor memory devices designed for testing

Process of making and a DRAM standby charge pump with oscillator having fuse selectable frequencies

Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices

Write per bit with write mask information carried on the data path past the input data latch

Electrical fuse control of memory slowdown