Steven D. Krueger
Texas Instruments
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Featured researches published by Steven D. Krueger.
field-programmable custom computing machines | 2004
Steven D. Krueger; Peter-Michael Seidel
We present the design of an on-line IEEE floating-point (FP) adder. In on-line arithmetic a result is computed as a digit serial output stream from digit serial input streams. The result digits begin to be produced a short delay after the first input digits arrive and before all the input digits have been received. On-line arithmetic proceeds from the most significant digit first through the least significant digit. Performing on-line addition on IEEE FP numbers imposes challenges beyond the challenges of conventional on-line arithmetic, including the task of normalization and IEEE rounding and its effect on the digits already output. The proposed implementations are very suitable for FPGAs, because the serial organization simplifies critical components of conventional FPGA IEEE FP addition implementations: Large alignment and normalization shifters are avoided allowing for reduced interconnection complexities and reasonable latencies at low implementation cost. The proposed implementations are fully compliant with the IEEE FP standard.
Archive | 1994
Wilbur C. Vogley; Anthony M. Balistreri; Karl M. Guttag; Steven D. Krueger; Duy-Loan T. Le; Joseph H. Neal; Kenneth A. Poteet; Joseph P Hartigan; Roger D. Norwood
Archive | 2002
Steven D. Krueger
Archive | 1997
Steven D. Krueger; Jonathan H. Shiell
Archive | 2000
Timothy D. Anderson; David Hoyle; Donald E. Steiss; Steven D. Krueger
Archive | 1997
Tai-Yuen Chan; Steven D. Krueger; Jonathan H. Shiell
Archive | 1994
Wilbur C. Vogley; Anthony M. Balistreri; Karl M. Guttag; Steven D. Krueger; Duy-Loan T. Le; Joseph H. Neal; Kenneth A. Poteet; Joseph P Hartigan; Roger D. Norwood
Archive | 1997
Steven D. Krueger; Jonathan H. Shiell
Archive | 2006
Steven D. Krueger
Archive | 1990
Steven D. Krueger; Michael Amundsen