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Dive into the research topics where Frank Feustel is active.

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Featured researches published by Frank Feustel.


international semiconductor conference | 2013

Finite element analysis for BEOL stress engineering to improve yield and reliability of sub-30 nm structures

Eberhard Kaulfersch; Birgit Brämer; Sven Rzepka; Dirk Breuer; Ellen Clauss; Frank Feustel

Deformation of trenches due to residual stresses in TiN may result in Cu voids forming especially at shrinking feature sizes of trenches and vias and introducing low-k dielectrics between Cu interconnects. The influence of residual stress therefore has been investigated in a parametric study using Finite Element analyses (FEA) to discover the correlation between the TiN stresses and failure occurrence at various geometric representations. FEA has been shown to allow effective BEoL (Back end of line) stress engineering leading to improved yield and reliability of next generation interconnect systems in minimum development time.


Archive | 2009

3-D INTEGRATED SEMICONDUCTOR DEVICE COMPRISING INTERMEDIATE HEAT SPREADING CAPABILITIES

Thomas Werner; Michael Grillberger; Frank Feustel


Archive | 2010

FABRICATING VIAS OF DIFFERENT SIZE OF A SEMICONDUCTOR DEVICE BY SPLITTING THE VIA PATTERNING PROCESS

Frank Feustel; Thomas Werner; Kai Frohberg


Archive | 2009

REDUCING PATTERNING VARIABILITY OF TRENCHES IN METALLIZATION LAYER STACKS WITH A LOW-K MATERIAL BY REDUCING CONTAMINATION OF TRENCH DIELECTRICS

Frank Feustel; Thomas Werner; Michael Grillberger; Kai Frohberg


Archive | 2007

Test structure for monitoring leakage currents in a metallization layer

Frank Feustel; Thomas Werner; Carsten Peters


Archive | 2007

METHOD AND TEST STRUCTURE FOR ESTIMATING FOCUS SETTINGS IN A LITHOGRAPHY PROCESS BASED ON CD MEASUREMENTS

Thomas Werner; Frank Feustel; Kai Frohberg


Archive | 2007

Test structure for estimating electromigration effects with increased robustness with respect to barrier defects in vias

Frank Feustel; Kai Frohberg; Thomas Werner


Archive | 2007

METHOD FOR PREVENTING THE FORMATION OF ELECTRICAL SHORTS VIA CONTACT ILD VOIDS

Kai Frohberg; Sven Mueller; Frank Feustel


Archive | 2005

Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging

James Werking; Frank Feustel; Christian Zistl; Peter Huebler


Archive | 2011

Method of reducing contamination by providing a removable polymer protection film during microstructure processing

Ralf Richter; Frank Feustel; Thomas Werner; Kai Frohberg

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