Harald Wiesbauer

Recent progress in thin wafer processing

The ability to process thin wafers with thicknesses of 20-50um on front- and backside is a key technology for 3D IC. The most obvious reason for thin wafers is the reduced form factor, which is especially important for handheld devices. However, probably even more important is that thinner wafers enable significant cost reduction for TSVs. The silicon real estate consumed by the TSVs has to be minimized in order that the final device provides a performance advantage compared to traditional 2D devices. The only way to reduce area consumption by the TSVs is to reduce their diameter. For a given wafer thickness the reduction of TSV diameter increases the TSV aspect ratio. Consensus has developed on the use of Temporary Bonding / Debonding Technology as the solution of choice for reliably handling thin wafers through backside processing steps. While the majority of the device manufacturing steps on the front side of the wafer will be completed with the wafer still at full thickness, it will be temporarily mounted onto a carrier before thinning and processing of the features on its backside. Once the wafer reaches the temporary bonding step, it already represents a significant value, as it has already gone through numerous processing steps. For this reason, inspection of wafers prior to non-reworkable process steps is of great interest. Within the context of Temporary Bonding this consideration calls for inline metrology that allows for detection of excursions of the temporary bonding process in terms of adhesive thickness, thickness uniformity as well as bonding voids prior to thinning of the product wafer. This paper introduces a novel metrology solution capable of detecting all quality relevant parameters of temporarily bonded stacks in a single measurement cycle using an Infrared (IR) based measurement principle. Thanks to the IR based measurement principle, the metrology solution is compatible with both silicon and glass carriers. The system design has been developed with the inline metrology task in mind. This has led to a unique system design concept that enables scanning of wafers at a throughput rate sufficient to enable 100% inspection of all bonded wafers inline in the Temporary Bonding system. Both, current generation temporary bonding system throughputs and future high volume production system throughputs as required by the industry for cost effective manufacturing of 3D stacked devices were taken into account as basic specifications for the newly developed metrology solution. Sophisticated software algorithms allow for making pass/ fail decisions for the bonded stacks and triggering further inspection, processing and / or rework. Actual metrology results achieved with this novel system will be presented and discussed. In terms of adhesive total thickness variation (TTV) of bonded wafers, currently achieved performance values for postbond TTV will be reviewed in light of roadmaps as required by high volume production customers.

Thin WLFO and based WLSiP enabling WL3D, realized using Temporary Reconstituted Panel Bonding Technology

The interest in FOWLP as new flexible packaging technology platform is continuously increasing. High volume capability is proven for configurations with single die (WLFO), multi-die side-by-side, partially with discrete passives integration (WLMCM and WLSiP), both with single sided single and multiple RDL layers. The next step to achieve higher integration density, e.g. for mobile and IoT applications, is to go in the third dimension (WL3D/WLPoP) with total package thickness below 1mm, targeting 0.8mm and even less in the next development step. High design flexibility, superior performance and small form-factor in x and y, but even more important in z-dimension, are the essential packaging characteristics required for this type of smart system integration. The eWLB based WLFO technology platform of NANIUM promises to deliver all of those requirements. While previous generations of WLFO packages only consisted of one plane of single or multiple RDL layers (frontside RDL at BGA side), recent evolutions enab...

Temporary bonding on the move towards high volume: A status update on cost-of-ownership

The ability to process thin wafers with thicknesses of 20-50um on front- and back side is a key technology for 3D stacked ICs (3Ds-IC). The most obvious reason for thin wafers is the reduced form factor, which is especially important for handheld consumer devices. However, probably even more important is that thinner wafers enable significant cost reduction for TSVs. Consensus has developed on the use of temporary bonding and debonding technology as the solution of choice for reliably handling thin wafers through back side processing steps. Temporary bonding and debonding comprises several processes for which yield is essential, as costly fully functional device wafers are being processed. The temporary bonding process yield has a major impact on the overall Cost of Ownership (CoO). On the other hand, throughput of the individual process steps like spin coating, bonding, cure, debonding and cleaning processes is the second determining factor for improved CoO. This paper should provide in depth understanding of CoO contributors to temporary bonding and debonding. Focus is put on the cost sensitivity of the major influencing contributor to temporary bond as well as debonding.

An innovative and low cost Bi-layer method for temporary bonding

The purpose of this work was to demonstrate the compatibility of Dow Cornings temporary bonding solution with EVGs 850XT universal temporary bonding and debonding platform. The proposed process made use of well-known processing steps and processing modules like spin coating. The process consisted of a release layer (Dow Corning® WL-3001 Bonding Release) and an adhesive layer (Dow Corning® WL-4050 or WL-4030 Bonding Adhesive) using an EVG® 850TB - 300 mm XT frame. Both layers of material were applied by spin coating on the device wafer side. In the frame of this study, silicon carriers were used. Bonding was performed under vacuum at room temperature. A post bonding bake step was applied using a hotplate. After subsequent backside processing steps, the room temperature debonding was performed.

Temporary-bonding and LowTemp® debonding technology for various applications

A standard TB/DB technology capable of wide-range of adhesives is strongly required for various TB/DB applications. Maximum temperature of backside process was investigated for 5 kinds of adhesives. ZoneBOND™ technology has been demonstrated to have much flexibility in adhesives, resulting applicable to various applications.