Hyeong-Geun An

Enhanced Retention Characteristics of Pb(Zr, Ti)O3 Capacitors by Ozone Treatment

Effects of ozone treatment and charged defects on retention characteristics of Ir/IrO2/Pb(Zr, Ti)O3 (PZT)/Pt/IrO2/Ir capacitors were systematically investigated. For these purposes, PZT thin films were exposed to ozone environment to promote enhanced surface oxidation. After baking the Ir/IrO2/PZT/Pt/IrO2/Ir capacitors at 125°C for 500 h, degradation of Qnv (non-volatile charge) value of the ozone-treated capacitors was approximately 17.6%, that is less than one fifth of that of the untreated capacitors. X-ray photoelectron spectroscopy (XPS) and Auger electron spectroscopy (AES) studies showed that the amount of oxygen-vacancies near the PZT surface was dramatically decreased by the ozone treatment. The Schottky barrier height of the ozone-treated capacitors increased when compared to that of the untreated capacitors (the Schottky barrier height of the untreated and the ozone-treated capacitor was 0.29 eV and 0.43 eV, respectively). Therefore, one can conclude that the retention characteristics seem to be closely associated with oxygen related defects near the ferroelectric/electrode interface and the control of the interface properties of PZT thin film is a key technology to pursue reliable function characteristics of ferroelectric random access memory (FRAM) devices.

Integration of ferroelectric random access memory devices with Ir/IrO2/Pb(ZrxTi1-x)O3/Ir capacitors formed by metalorganic chemical vapor deposition-grown Pb(ZrxTi1-x)O3

Metal organic chemical vapor deposition (MOCVD) of Pb(ZrxTi1-x)O3 (PZT) and its capacitor module process were established for ferroelectric memory device integration. The 130 nm-thick PZT films were deposited on Ir layers at 530°C or 550°C. The remnant polarization of the Ir/IrO2/PZT/Ir capacitors is in the range of 15 to 21 µC/cm2, and their leakage current is 10-5 A/cm2 at 2.5 V without additional annealing. The degradation in their switching endurance is less than 5% after 1010 cycles, indicating that the interfaces formed between the PZT and Ir layers can be optimized to improve their fatigue properties. To evaluate the capacitors on the devices, the conventional backend process was performed after encapsulating the capacitors with AlOx/TiOx layers located on the poly-Si plug. High charge separation and fully functional bit activities were obtained, demonstrating that this MOCVD-PZT process is a reliable integration scheme for high-density ferroelectric memory devices.

Plasma-assisted dry etching of ferroelectric capacitor modules and application to a 32M ferroelectric random access memory devices with submicron feature sizes

In the manufacturing of a 32M ferroelectric random access memory (FRAM) device on the basis of 0.25 design rule (D/R), one of the most difficult processes is to pattern a submicron capacitor module while retaining good ferroelectric properties. In this paper, we report the ferroelectric property of patterned submicron capacitor modules with a stack height of 380 nm, where the 100 nm-thick Pb(Zr, Ti)O3 (PZT) films were prepared by the sol-gel method. After patterning, overall sidewall slope was approximately 70° and cell-to-cell node separation was made to be 80 nm to prevent possible twin-bit failure in the device. Finally, several heat treatment conditions were investigated to retain the ferroelectric property of the patterned capacitor. It was found that rapid thermal processing (RTP) treatment yields better properties than conventional furnace annealing. This result is directly related to the near-surface chemistry of the PZT films, as confirmed by X-ray photoelectron spectroscopy (XPS) analysis. The resultant switching polarization value of the submicron capacitor was approximately 30 µC/cm2 measured at 3 V.