J. R. Lee

Anomalous Reduction of Hot-Carrier-Induced On-Resistance Degradation in n-Type DEMOS Transistors

Anomalous hot-carrier degradation phenomenon was observed in a 0.5-mum 12-V n-type drain-extended MOS transistors (N-DEMOS) with various n-type drain-drift (NDD) implant dosage. Under the same stress condition, the device with a higher NDD dosage produces a higher substrate current, a slightly higher transconductance degradation, but a lower ON-resistance (RON) degradation. Two degradation mechanisms are identified from the analysis of the electrical data and two-dimensional device simulations. The first mechanism is hot-electron injection in the accumulation region near the junction of the channel and accumulation regions. The second mechanism is hot-hole injection in the accumulation region near the spacer. This injection of hot holes creates a positive-charge trapping in the gate oxide, resulting in negative mirror charges in the accumulation region that reduces RON. The second mechanism is identified to account for the anomalous lower RON degradation

Effects of gate bias on hot-carrier reliability in drain extended metal-oxide-semiconductor transistors

The effect of gate voltage on hot-carrier induced degradation in drain extended high-voltage metal-oxide-semiconductor (MOS) transistors with thick gate oxide (100nm) structure is presented. Different from the conventional low-voltage n-type MOS transistors, under a fixed drain voltage, devices stressed at a higher Vgs result in a greater maximum transconductance and on-resistance degradation. Under higher Vgs, the increase in channel hot-carrier injection is responsible for the greater Gm,max degradation. On the other hand, Kirk effect induced increase in drain avalanche hot carriers near the drain as well as higher electric field in the channel is responsible for the greater Ron degradation.

Effect of Drift-Region Concentration on Hot-Carrier-Induced

In this letter, hot-carrier-induced on-resistance (Ron) degradation in lateral DMOS transistors with different n-type drift-drain (NDD) region concentration is investigated. Increasing NDD concentration results in greater bulk (Ib) and gate currents (Ig), but Ron degradation is improved. Technology computer-aided design simulations reveal that high NDD concentration increases impact-ionization rate in accumulation (related to Ib increase) and channel regions (related to Ig increase) but reduces impact-ionization rate in spacer region. Charge-pumping data confirm that hot-carrier-induced interface state created in the spacer region is reduced, leading to improved Ron degradation in high-NDD-concentration device.

R_{\rm on}

The mechanism of hot-carrier-induced degradation in n-type lateral diffused metal-oxide-semiconductor (LDMOS) transistors is investigated. Experimental data reveal that hot-electron injection induced interface state generation in channel region is the main degradation mechanism. Since gate current (Ig) consists mainly of electron injection, Ig correlates well with device degradation. As a result, a lifetime prediction method based on Ig is presented for the purpose of projecting hot-carrier lifetime in LDMOS transistors.

Degradation in nLDMOS Transistors

The mechanisms of hot-carrier-induced linear drain current (Idlin) degradation in a 0.35μm n-type lateral diffused metal-oxide-semiconductor transistor, operating at a nominal voltage of 12V, is investigated. Results and analysis show that the location of hot-carrier-induced interface states varies with stress gate voltage. Stress-induced interface states located in accumulation region under polygate have little effect on Idlin degradation. As a result, interface states located in drain-side spacer region dominate Idlin degradation when interface states located in channel region are negligible.

Mechanism and lifetime prediction method for hot-carrier-induced degradation in lateral diffused metal-oxide-semiconductor transistors

The hot-carrier reliability of 12 V high-voltage n-channel double diffused drain metal–oxide–semiconductor (DDDMOS) field-effect transistors with various n-type double diffusion (NDD) implant dosages is investigated. A high NDD implant dosage results in a high substrate current; however, on-resistance (Ron) degradation is low. The damage location shifting toward the channel is responsible for this unexpected low Ron degradation. Technology computer-aided design (TCAD) simulation and charge pumping measurements are carried out to identify the damage location. Our analysis results reveal that an increase in NDD dosage is effective for improving the reliability of the DDDMOS field-effect transistors.

Effect of hot-carrier-induced interface states distribution on linear drain current degradation in 0.35 μm n-type lateral diffused metal-oxide- semiconductor transistors

The hot-carrier-induced degradation in the high-voltage n-type lateral diffused metal–oxide–semiconductor (LDMOS) field-effect transistor is investigated. Interface state generation caused by hot-electron injection in the channel region is identified to be the main degradation mechanism. Since the gate current (Ig) consists mainly of the electron injection, Ig correlates well with the hot-carrier lifetime of the device. The impact of varying device layout parameter on the performance and hot-carrier lifetime of the device are also evaluated. Such an analysis can achieve a better design of LDMOS transistors when considering both device performance and hot-carrier reliability.

Characteristics and improvement in hot-carrier reliability of sub-micrometer high-voltage double diffused drain metal-oxide-semiconductor field-effect transistors

Anomalous increase in positive threshold voltage shift (ΔVT) in n-type drain extended metal-oxide-semiconductor (DEMOS) transistors stressed under high drain voltage and gate voltage is observed. Charge pumping data and technology computer-aided-design simulations reveal that hot-electron injection and trapping in the gate oxide above channel region is responsible for ΔVT. Enhanced impact ionization rate resulted from the presence of large amount of negative oxide charge in channel region is identified to be the main mechanism for anomalous increase in ΔVT. From the results presented in this letter, hot-carrier-induced anomalous increase in ΔVT can become a serious reliability concern in DEMOS transistors.

An Investigation on Hot-Carrier Reliability and Degradation Index in Lateral Diffused Metal-Oxide-Semiconductor Field-Effect Transistors

High-voltage (HV) devices such as Double Diffused Drain MOS (DDDMOS) transistors are integrated with submicron CMOS integrated circuit in power management ICs. Recently, hot-carrier reliability of HV MOS transistors has attracted wide attention. This paper presents the effect of n-type double diffusion (NDD) implant dosages on hot-carrier reliability of DDDMOS transistors.