J. Scott

Near-simultaneous dual energy range EELS spectrum imaging.

A system that allows the collection of the low loss spectrum and the core loss spectrum, covering different energy regions, at each pixel in a spectrum image is described. It makes use of a fast electrostatic shutter with control signals provided by the spectrum imaging software and synchronisation provided by the CCD camera controller. The system also allows simultaneous collection of the X-ray spectrum and the signals from the imaging detectors while allowing the use of the existing features of the spectrum imaging software including drift correction and sub-pixel scanning. The system allows acquisition of high-quality spectra from both the core and the low loss regions, allowing full processing of the EELS data. Examples are given to show the benefits, including deconvolution, absolute thickness mapping and determination of numbers of atoms per unit area and per unit volume. Possible further developments are considered.

GdGaO: A gate dielectric for GaAs metal-oxide-semiconductor field-effect transistors

GdxGa0.4−xO0.6∕Ga2O3 dielectric stacks have been grown on (001)GaAs to form a III-V∕oxide with a low interface state density and a high conduction band offset. Photoluminescence is used to compare the stacks with low interface state density Ga2O3–GaAs layers. Rutherford backscattering and electron energy loss spectroscopy are used to investigate the Gd compositional variation with depth and this is related to the interface state density. The effect of Gd flux and atomic oxygen on the growth rate is reported. The leakage current through GdxGa0.4−xO0.6∕Ga2O3 stacks is compared with ones using only Ga2O3 as the oxide.

Elemental Profiling of III-V MOSFET High- k Dielectric Gate Stacks Using EELS Spectrum Imaging

In this paper a quantitative determination of the elemental distribution across a GaAs/Ga2O3/GGO dielectric gate stack is presented and the analysis discussed. The EELS spectrum imaging technique is described and the data analysis discussed.

EFTEM and EELS SI: tools for investigating the effects of etching processes for III-V MOSFET devices

High quality oxides layers are now available for MOSFETs on GaAs. For successful devices, suitable process schemes are required. In this paper we show an investigation of an etching process on a GaAs/Ga2O3/GGO dielectric gate stack. This investigation has been carried out using EFTEM and EELS SI. EFTEM provides a quick analysis on the structure while EELS SI offers much better resolution and the possibility to quantitatively characterize the material.