Joseph M. Lukaitis

The effects of fluorine on parametrics and reliability in a 0.18-/spl mu/m 3.5/6.8 nm dual gate oxide CMOS technology

Fluorine was introduced into the gate oxide by implantation at various doses into the gate polysilicon. After complete processing, the fluorine remaining in the system was characterized by secondary ion mass spectroscopy (SIMS) and then correlated to a number of important technological device parameters. The threshold voltages of thin (3.5 nm) and thick (6.8 nm) field-effect transistors (FETs) were measured, and an increase in interface trap density with increasing fluorine content was identified. An increase in oxide thickness and improvement in hot-carrier immunity were observed. Little change to oxide dielectric integrity was noted, but the negative bias threshold instability (NBTI) shift was improved with the introduction of fluorine. These data indicate that benefits may be obtained by introducing fluorine into the p-type FET (PFET), but that the increase in interface traps makes fluorine in the n-type FET (NFET) less attractive from a technological perspective. These data are in agreement with a previously proposed mechanism whereby fluorine removes hydrogen-related sites from the oxide.

NBTI-channel hot carrier effects in PMOSFETs in advanced CMOS technologies

In this work the reliability of a 0.35 /spl mu/m p+ poly-gate pMOSFET CMOS technology under conductive channel hot carrier conditions is investigated. It is found that at any bias and temperature condition applied, the degradation of sufficiently short channel length (Leff/spl sime/0.14 um) devices results in a reduction in drive current due to the impact of donor type interface trap generation and positive charge formation during the stress. At these dimensions the degradation is controlled by a contribution of both Negative Bias Temperature Instability (NBTI) and Channel Hot Carrier (CHC) mechanism. We will show the role that each of these two mechanisms play in determining the shift of typical device parameters. A methodology to decouple the two effects is also provided allowing to quantify each contribution separately at any bias and temperature condition. A conductive CHC model that takes into account the impact of both mechanisms to the device lifetime at the worst observed degradation condition (Vg=Vd) is also discussed.