L.J. Choi

A Novel Fully Self-Aligned SiGe:C HBT Architecture Featuring a Single-Step Epitaxial Collector-Base Process

In this paper we describe a novel fully self-aligned HBT architecture, which enables a maximum reduction of device parasitics. TCAD simulations show that this architecture is capable of achieving fT/fmax values of 295/425 GHz for an effective emitter area of 0.13times5 mum2. In this new process approach, which is fully CMOS compatible, the collector and base are grown in a single-step non-selective epitaxial process on top of pre-defined bipolar areas. This provides new opportunities for collector-base profile engineering. The collector drift region and the extrinsic base are made self-aligned to the emitter by means of a dry etch that removes all polycrystalline material. The remaining epitaxial pedestal defines the intrinsic device and makes deep trench isolation redundant. We describe the major features of the integration scheme and show measured fT/fmax values of 300/220 GHz on the first fabricated devices with an effective emitter area of 0.13times5 mum2.

Lateral and vertical scaling of a QSA HBT for a 0.13/spl mu/m 200GHz SiGe:C BiCMOS technology

A 200 GHz F/sub t/ SiGe:C HBT has been integrated into a 0.13 /spl mu/m BiCMOS technology. A previous generation low complexity quasi self-aligned architecture (QSA) is scaled down both in a lateral and vertical way. Lateral sizing is obtained by using present-day step and scan tools. Vertical sizing is achieved by reducing the thermal budget of the active module and by an aggressive scaling of the SiGe:C base epitaxial layer. A deep trench module, featuring a thick oxide liner, has been developed. Excellent DC parameters and peak Ft/Fmax values of 200/160 GHz are demonstrated. The CMOS device characteristics remain unchanged by applying low thermal budget processing in the bipolar module.

On the Use of a SiGe Spike in the Emitter to Improve the

Aggressive vertical scaling of SiGe HBTs has yielded impressive values for the cut-off frequencies (fT), but these HBTs often suffer from too high current gains. This leads to low values for the open-base breakdown voltage (BVCEO). In this letter we demonstrate the use of a SiGe spike in the emitter as a practical method to increase the base current. Hence, the breakdown voltage is increased. At the same time, the device RF performance is not affected, which leads to a significant improvement in the fTxBVCEO product

f_{T}\hbox{xBV}_{\rm CEO}

A novel scheme for deep trench isolation is presented, which uses an airgap as insulator. When incorporated in our 0.13mum SiGe:C BiCMOS technology, the peripheral substrate parasitics decrease with an order of magnitude to a record value of 0.02fF/mum, which significantly improves the device RF performance

Product of High-Speed SiGe HBTs

A QSA airgap isolated HBT module, embedded in a 0.13mum BiCMOS technology, reaches fT/fmaxvalues of 205/275GHz and a 3.5ps CML gate-delay. A 17GHz LNA using high quality passives sustains above 8kV HBM ESD stress

A Novel Deep Trench Isolation Featuring Airgaps for a High-Speed 0.13μm SiGe:C BiCMOS Technology

A novel isolation scheme is presented in this work, which uses oxide filled cavities in the collector to separate the extrinsic base and collector regions. When incorporated in our 0.13μm SiGe:C BiCMOS technology, a further improvement of the device RF performance is obtained, yielding devices with fT/fmax values of 210/290GHz and 255/210GHz.

A 205/275GHz fT/fmax Airgap Isolated 0.13 m BiCMOS Technology featuring on-chip High Quality Passives

The performance of analog circuits operating at high frequencies is limited by device mismatch at these frequencies. In this paper, high-frequency measurements of the mismatch on the Y-parameters of bipolar transistors are discussed. After investigation of the impact of the deembedding structures and measurement accuracy, the RF matching behavior of 200 GHz SiGe:C HBTs is characterized over a wide range of frequencies and biasing conditions. The mismatch on the cut-off frequency and small-signal parameters are extracted.

A Novel Isolation Scheme featuring Cavities in the Collector for a High-Speed 0.13μm SiGe:C BiCMOS Technology

In this paper, the trade-off between time and accuracy for measurement of the matching performance of bipolar transistors has been investigated. After determination of the limits of the hardware setup, the matching behavior of 200 GHz SiGe:C HBTs is characterized over a wide range of dimensions and biasing conditions. The focus is put on measurements in the low and high current region. It reveals the unique bias dependence of bipolar current mismatch in the high current region.