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Dive into the research topics where Natalie B. Feilchenfeld is active.

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Featured researches published by Natalie B. Feilchenfeld.


Ibm Journal of Research and Development | 2003

Foundation of rf CMOS and SiGe BiCMOS technologies

James S. Dunn; David C. Ahlgren; Douglas D. Coolbaugh; Natalie B. Feilchenfeld; G. Freeman; David R. Greenberg; Robert A. Groves; Fernando Guarin; Youssef Hammad; Alvin J. Joseph; Louis D. Lanzerotti; Stephen A. St. Onge; Bradley A. Orner; Jae Sung Rieh; Kenneth J. Stein; Steven H. Voldman; Ping-Chuan Wang; Michael J. Zierak; Seshadri Subbanna; David L. Harame; Dean A. Herman; Bernard S. Meyerson

This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal system-on-a-chip (SoC). The paper reviews the process development and integration methodology, presents the device characteristics, and shows how the development and device selection were geared toward usage in mixed-signal IC development.


bipolar/bicmos circuits and technology meeting | 1999

A 0.24 /spl mu/m SiGe BiCMOS mixed-signal RF production technology featuring a 47 GHz f/sub t/ HBT and 0.18 /spl mu/m L/sub ett/ CMOS

S. St Onge; David L. Harame; James S. Dunn; Seshadri Subbanna; David C. Ahlgren; G. Freeman; Basanth Jagannathan; J. Jeng; Kathryn T. Schonenberg; Kenneth J. Stein; R. Groves; D. Coolbaugh; Natalie B. Feilchenfeld; Peter J. Geiss; M. Gordon; Peter B. Gray; Douglas B. Hershberger; S. Kilpatrick; Robb Allen Johnson; Alvin J. Joseph; Louis D. Lanzerotti; John C. Malinowski; Bradley A. Orner; Michael J. Zierak

A new base-after-gate integration scheme has been developed to integrate a 47 GHz f/sub t/, 65 GHz F/sub max/SiGe HBT process with a 0.24 /spl mu/m CMOS technology having 0.18 /spl mu/m L/sub eff/ and 5 nm gate oxide. We discuss the benefits and challenges of this integration scheme which decouples the HBT from the CMOS thermal cycles. We also describe the resulting 0.24 /spl mu/m SiGe BiCMOS technology, BiCMOS 6HP, which includes a 7 nm dual gate oxide option and full suite of passive components. The technology provides a high level of integration for mixed-signal RF applications.


international reliability physics symposium | 2000

Trends in silicon germanium BiCMOS integration and reliability

James S. Dunn; D. L. Harame; S. St Onge; Alvin J. Joseph; Natalie B. Feilchenfeld; K. Watson; Seshadri Subbanna; G. Freeman; Steven H. Voldman; David C. Ahlgren; Robb Allen Johnson

A base-after-gate integration scheme has been developed fora 0.25 /spl mu/m SiGe BiCMOS and the details of the approach are discussed. NPN device reliability is reviewed for high-frequency transistors. The reliability aspects associated with using SiGe for applications with high collector-base voltage with high emitter current are also explored. Finally, the ESD characteristics of the SiGe BiCMOS technology elements are summarized.


bipolar/bicmos circuits and technology meeting | 2002

High performance, low complexity 0.18 /spl mu/m SiGe BiCMOS technology for wireless circuit applications

Natalie B. Feilchenfeld; Louis D. Lanzerotti; David C. Sheridan; Ryan W. Wuthrich; Peter J. Geiss; D. Coolbaugh; Peter B. Gray; J. He; P. Demag; J. Greco; T. Larsen; V. Patel; Michael J. Zierak; Wade J. Hodge; Jay Rascoe; J. Trappasso; Bradley A. Orner; A. Norris; Douglas B. Hershberger; B. Voegeli; Steven H. Voldman; Robert M. Rassel; V. Ramachandrian; Michael L. Gautsch; Ebenezer E. Eshun; R. Hussain; D. Jordan; S. St Onge; James S. Dunn

High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that offers 3 different breakdown voltage NPNs; with the high performance device achieving F/sub t//F/sub max/ of 60/85 GHz with a 3.0 V BV/sub CEO/. In addition, a full suite of high performance passive devices complement the state-of-the-art SiGe wireless HBTs.


international reliability physics symposium | 2005

The influence of a silicon dioxide-filled trench isolation structure and implanted sub-collector on latchup robustness

Steven H. Voldman; Ephrem G. Gebreselasie; Louis D. Lanzerotti; T. Larsen; Natalie B. Feilchenfeld; S. St Onge; Alvin J. Joseph; James S. Dunn

This paper demonstrates the effect of a new low-cost oxide filled trench isolation structure, and implanted sub-collectors, on the latchup robustness. With scaling and focus on low-cost wireless technology, new technologies are being developed utilizing a shallower oxide-filled trench structure and low-doped implanted sub-collectors. In this paper, the first latchup measurements and corresponding new discoveries are shown, utilizing this new isolation structure and its integration with implanted sub-collectors. This paper compares latchup measurements with the base CMOS technology (e.g. standard dual well p-substrate base technology) to quantify the net improvement. The results are shown with trench isolation only, sub-collector only, and the combined effect of the trench isolation and sub-collector.


bipolar/bicmos circuits and technology meeting | 2004

A low complexity 0.13 /spl mu/ SiGe BiCMOS technology for wireless and mixed signal applications

Louis D. Lanzerotti; Natalie B. Feilchenfeld; D. Coolbaugh; James A. Slinkman; Peter B. Gray; David C. Sheridan; J. Higgins; Wade J. Hodge; M. Gordon; T. Larsen; Michael L. Gautsch; P. Lindgren; R. Murty; Jay Rascoe; K. Watson; T. Stamper; Ebenezer E. Eshun; J. He; K. Downes; Robert M. Rassel; J. Greco; B. Labelle; S. Sweeney; Kenneth J. Stein; R. Bolam; K. Vaed; B. Omer; Alvin J. Joseph; S. St Onge; J. Dunn

We present IBMs next-generation, cost-performance-optimized BiCMOS technology (BiCMOS 8WL) which combines a state-of-the-art suite of SiGe NPNs, foundry compatible 0.13 μm CMOS, and a rich set of modular passive devices. Intended for a wide variety of supply voltages, the technology, features three different performance NPNs and standard, dual oxide, zero V t , and junction isolated FETs. Optimized for wireless and mixed signal applications, BiCMOS 8WL will enable system on a chip integration for 3G cellular applications.


electrical overstress/electrostatic discharge symposium | 2004

Electrostatic discharge (ESD) protection of giant magneto-resistive (GMR) recording heads with a silicon germanium technology

Steven H. Voldman; Sam Luo; Calvin Shizuo Nomura; Kevin Roy Vannorsdel; Natalie B. Feilchenfeld

Experimental studies on the ESD protection were completed on advanced magnetic recording giant magneto-resistive heads using a BiCMOS silicon germanium technology for the first time. SiGe-based active and passive elements, such as isolated MOSFETs, varactors and Schottky diodes were used to evaluate the influence of turn-on voltage on the protection levels.


custom integrated circuits conference | 2006

SiGe BiCMOS Trends - Today and Tomorrow

James S. Dunn; David L. Harame; Alvin J. Joseph; Stephen A. St. Onge; Natalie B. Feilchenfeld; Louis D. Lanzerotti; Bradley A. Orner; Ephrem G. Gebreselasie; Jeffrey B. Johnson; Douglas D. Coolbaugh; Robert M. Rassel; Marwan H. Khater

High performance communications applications have made technology choices more important than ever. Silicon germanium (SiGe) BiCMOS has enabled the widespread introduction of many these applications by providing superior cost and integration capability, compared to III-V solutions and, relative to RFCMOS, one can attain better time to market. BiCMOS integration approaches for high performance and cost performance NPN modules and state of the art passive elements are discussed as well as future technology directions


bipolar/bicmos circuits and technology meeting | 2000

ESD robustness of a BiCMOS SiGe technology

Steven H. Voldman; Patrick Juliano; N. Schmidt; A. Botula; Robb Allen Johnson; Louis D. Lanzerotti; Natalie B. Feilchenfeld; J. Joseph; John C. Malinowski; E. Eld; V. Gross; C. Brennan; James S. Dunn; David L. Harame; D. Herman; Bernard S. Meyerson

High current characterization of epitaxial-base pseudomorphic silicon germanium heterojunction npn bipolar transistors (HBT) for evaluation of the electrostatic discharge (ESD) robustness is reported. BiCMOS active and passive elements are discussed.


international symposium on power semiconductor devices and ic's | 2012

Planar dual gate oxide LDMOS structures in 180nm power management technology

Santosh Sharma; Theodore J. Letavic; Yun Shi; Alain Loiseau; John-Ellis Monaghan; Natalie B. Feilchenfeld; Rick Phelps; Christopher Lamothe; Don Cook; James S. Dunn; Georg Roerher; Helmut Nauschnig; Rainer Minixhofer

This paper presents a 20V-rated planar dual gate oxide NLDMOS power device structure fabricated in a 180nm power management technology. The performance of the planar dual gate device structure is compared to a conventional STI-based device and it is shown that the planar dual gate structure has superior BVds-Rsp, gm, HCI reliability, and forward safe operating area figures-of-merit. The planar dual gate structure exhibits BVds=32V/14 mΩ.mm2 specific on-resistance (and BVds=20V/7.5mΩ.mm2 for a drift length scaled version), hot carrier reliability in excess of 10 years analog lifetime in all bias regimes, and a linear forward IV characteristic. The planar dual gate architecture is scalable in rated voltage from 7V to 24V, and is an ideal component for the integration of USB switch, battery charging, backlighting, and PA envelope tracking mobile applications.

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