Maciej Wojnowski

Embedded wafer level ball grid array (eWLB) technology for millimeter-wave applications

The embedded wafer level ball grid array (eWLB) is a novel packaging technology that shows excellent performance for millimeter-wave (mm-wave) applications. We present simulation and measurement results of single-ended and differential transmission lines realized using the thin-film redistribution layers (RDL) of an eWLB. We demonstrate the capabilities for the integration of passives on example of a configurable 17/18 GHz down-converter circuit realized in silicon-germanium (SiGe) technology with a fan-in eWLB differential inductor used for the LC tank. We compare the performance of differential chip-package-board transitions realized in an eWLB and in other common package types. We report an optimized compact chip-package-board transition in the eWLB. We obtain a simulated insertion loss as low as −0.65 dB and a return loss below −16 dB at 77 GHz without external matching networks. We introduce the concept of antenna integration in the eWLB and show examples of single-ended and differential antenna structures. Finally, we present for the first time a single-chip four-channel 77 GHz transceiver in SiGe integrated in the eWLB package together with four dipole antennas. The presented examples demonstrate that the eWLB technology is an attractive candidate for mm-wave applications including system-in-package (SiP).

A 77 GHz SiGe mixer in an embedded wafer level BGA package

We present a fully operational 77 GHz SiGe mixer assembled in a chip-scale embedded wafer level BGA (eWLB) package. This innovative package has a footprint with a standard pad pitch of 0.5 mm and a standard package height of 0.4 mm. The results demonstrate an excellent potential of the eWLB package concept for mm-wave applications. The measured gain of the packaged mixer is in best case only 1 dB smaller than measured on-wafer. Further, we analyze the transition from the printed circuit board (PCB) to the chip in package. We compare the results of our analysis with the measured performance of the packaged mixers. We achieve a good agreement between simulations and measurements. Finally, we discuss the methods for improving the electrical performance of the packages assembled on the PCB.

A 77-GHz SiGe single-chip four-channel transceiver module with integrated antennas in embedded wafer-level BGA package

We present for the first time a fully operational 77-GHz silicon-germanium (SiGe) single-chip four-channel transceiver module with four integrated antennas assembled in an embedded wafer-level ball grid array (eWLB) package. This eWLB module has a size of 8 mm × 8 mm and a footprint with a standard ball pitch of 0.5 mm. The module includes four half-wave dipole antennas that are realized using the thin-film redistribution layer (RDL) of the eWLB. The antennas are connected to the transceiver chip using 100-Ω differential coplanar strip (CPS) lines realized in the RDL. The ground plane on top of the printed circuit board (PCB) is used as a reflector for the integrated antenna. Due to integration of the antenna in the package, all mm-wave signals are restricted to the package and no mm-wave transitions to the PCB are required. Moreover, the position of the reflector on the top metallization of the PCB is of great advantage, as it makes the integrated antenna unconstrained by the actual PCB material. Thus, the module can be assembled on any type of PCB. We show that using four radiating elements, it is possible to realize radar system with basic 2D beamforming capabilities. The presented results demonstrate the importance of coherent chip-package co-design and the excellent potential of the eWLB for mm-wave system-in-package (SiP) applications.

Embedded wafer level ball grid array (eWLB) technology for system integration

Silicon front-end and assembly and packaging technology more and more merge. In addition interconnect density reaches limits for advanced CMOS technology. In this paper we introduce the fan-out embedded wafer level packaging technology, which is an example to link front-end and packaging technology and offers additional freedom for interconnect design. We demonstrate capabilites for system integration of the eWLB technology, which includes system on chip (SoC) integration and system in package (SiP) integration like side by side and stacking of devices. We highlight the importance of understanding properties of new materials, which influence warpage or heat dissipation. We also show the excellent performance of the eWLB package for mm-wave applications.

Multimode TRL Calibration Technique for Characterization of Differential Devices

In this paper, a new comprehensive analytical derivation and discussion of the multimode thru-relfect-line (TRL) calibration based on the new generalized reverse cascade matrices is presented. The advantage of the presented formulation is that it can account for certain symmetries in the measurement setup and reflect them in the symmetry of the derived relationships. The focus is on the two-mode case since this covers the majority of the practical applications. To demonstrate the effectiveness of the new formulation, the practical use of the multimode TRL calibration technique for de-embedding purposes is discussed. The common de-embedding assumptions such as reciprocity and symmetry are analyzed and their consequences on the multimode TRL calibration are discussed. It is shown that these assumptions applied to the embedding networks can reduce the requirements on the reflect standard. The use of the multimode TRL calibration technique for un-terminating purposes is discussed. It is demonstrated that in the special de-embedding case it is possible to completely characterize the partially leaky embedding networks. The problems of interpretation and re-normalization of the measured scattering parameters are also discussed. Finally, the on-wafer measurement results are presented that verify the multimode TRL approach for four-port vector network analyzer calibration and de-embedding of differential devices.

High-

We investigate high-quality (high-Q) inductors implemented in the redistribution layer (RDL) of the fan-in and fan-out area of an embedded wafer-level ball grid array (eWLB) package. The eWLB is an innovative package technology introduced recently for wireless applications. The technology has outstanding capabilities especially for high-frequency and millimeter-wave package design. We demonstrate that inductors realized in the eWLB fan-out area have negligible substrate losses and lower parasitic capacitances compared to inductors in the eWLB fan-in area. As a result, the inductors implemented in the fan-out area offer significantly higher quality factors and higher self-resonance frequencies. We investigate the effects of the chip-to-package interconnection. We show that the chip-to-package transition creates a bottleneck for the integration of high-Q inductors. We demonstrate the advantages of inductors in the fan-out area of the eWLB on the example of a 6-GHz voltage-controlled oscillator (VCO) chip manufactured in a 65-nm complementary metal-oxide-semiconductor process and assembled in an eWLB package. For the LC tank of this example, we use a 1.1-nH high-Q differential fan-out eWLB inductor to reduce the phase noise. For comparison, we investigate a VCO fabricated with a standard on-chip inductor and assembled in the identical eWLB package. Our measurement results demonstrate lower phase noise and higher output power for all VCOs with inductors embedded in the RDL compared to the reference VCO with the on-chip inductor. The measured phase noise for the VCO with the eWLB inductor in the fan-out area is in the best case 9 dB lower than that of the reference VCO with the on-chip inductor. The presented results prove the integration concept and demonstrate the excellent potential of embedded inductors realized in the fan-out area of the eWLB package.

Q

The embedded wafer level ball grid array (eWLB) is a novel system integration platform introduced recently. The eWLB technology is an attractive solution for high-frequency system-in-package (SiP) integration due to the capability to design high-quality (high-Q) embedded passives in the fan-out region and side-by-side multichip integration possibilities. In this paper, we show examples of using the fan-out region and the thin-film redistribution layer (RDL) advantageous for integration of inductors and antennas into an eWLB package. In addition, the use of the through encapsulant via (TEV) technology can extend the integration capabilities to 3D. We present measurement and simulation results of vertical interconnections realized using the RDL and TEVs of the eWLB. We demonstrate that the fan-out area of the eWLB can be used for the design of passive devices using the combination of TEV and RDL structures. We show examples of 3D inductors and transformers integrated in the eWLB. We present a fully integrated single-chip 60-GHz transceiver integrated in the eWLB package together with two dipole antennas as an example of mm-wave system integration.

Inductors Embedded in the Fan-Out Area of an eWLB

In this paper, a 77-GHz radar receiver is presented, which comes in a wafer level package and thus eliminates the need for wire bonding yielding significant cost reduction. The high integration level available in the productive Silicon-Germanium (SiGe) technology used in this paper allows for implementation of in-system monitoring of the receiver conversion parameters. This facilitates the realization of ISO 26262 compliant radar sensors for automotive safety applications.

Embedded wafer level ball grid array (eWLB) technology for high-frequency system-in-package applications

The thru-reflect-line (TRL) is one of the most fundamental and accurate vector network analyzer (VNA) calibration techniques. The multimode TRL calibration method generalizes the standard TRL technique to multimode waveguides. In this paper, the practical use of the multimode TRL calibration technique for de-embedding purposes is discussed. The focus is on the four-port case, since this covers the majority of the practical applications. However, the formulation can be easily extended for networks with higher number of ports. The common de-embedding assumptions such as reciprocity and symmetry are analyzed and their consequences on the multimode TRL algorithm are discussed. It is shown that the reciprocity assumption applied to the embedding networks reduces the requirements on the reflect standard. It is demonstrated that additional assumptions of either identical or symmetrical error networks make it possible to completely resolve the problem related to the reflect standard. Based on the derived formulation, it is shown that the multimode TRL calibration reduces to the traditional TRL de-embedding under reciprocity and symmetry assumptions. The problems of interpretation and re-normalization of the obtained scattering parameters (S-parameters) are also discussed. Finally, the measurement results are presented that verify the multimode TRL approach for de-embedding of four-port differential devices.

A 77GHz automotive radar receiver in a wafer level package

This work presents a highly integrated 57-64 GHz 4-channel receiver 2-channel transmitter chip targeting short range sensing and large bandwidth communications. The chip is housed in an embedded wafer level ball grid array package. The package includes 6 integrated patch antennas realized with a metal redistribution layer. The receiver patch antennas have a combined antenna gain of ≈10 dBi while each transmitter antenna has a gain of ≈6 dBi. The chip features a wide tuning range integrated VCO with a measured phase noise lower than -80 dBc/Hz at 100 kHz offset. Each of the differential transmitter channels shows a measured output power of 2-5 dBm over the complete frequency range. In addition, one transmitter channel features a modulator that can be digitally programmed to operate in either radar or communication mode. Each of the receiver channels has a measured conversion gain of 19 dB, a single-side-band noise figure of less than 10 dB and an input referred 1 dB compression point of less than 10 dBm. With all channels turned on the chip consumes a current of 300 mA from a 3.3 V supply. The functionality of the chip is demonstrated for both sensing and short range wireless communications.