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Publication
Featured researches published by Mattias E. Dahlstrom.
bipolar/bicmos circuits and technology meeting | 2006
Bradley A. Orner; Mattias E. Dahlstrom; A. Pothiawala; Robert M. Rassel; Qizhi Liu; Hanyi Ding; Marwan H. Khater; David C. Ahlgren; Alvin J. Joseph; James S. Dunn
The paper presents a 0.13 mum SiGe BiCMOS technology for millimeter wave applications. This technology features a high performance HBT (fT = 300 GHz /fmax = 330 GHz) along with various newly developed millimeter wave features, such varactor, Schottky and p-i-n diodes and other back end of line passives
bipolar/bicmos circuits and technology meeting | 2006
Robert M. Rassel; Jeffrey B. Johnson; Bradley A. Orner; Scott K. Reynolds; Mattias E. Dahlstrom; Jay Rascoe; Alvin J. Joseph; Brian P. Gaucher; James S. Dunn; S. St Onge
For the first time, a high performance, low leakage Schottky barrier diode (SBD) with cutoff frequency above 1.0 THz in a 130nm SiGe BiCMOS technology for millimeter-wave application is described. Device optimization has been evaluated by varying critical process and layout parameters such as, anode size, cathode depth, cathode resistivity, junction tailoring, and guardring optimization is investigated
International Journal of High Speed Electronics and Systems | 2007
Marwan H. Khater; Thomas N. Adam; Rajendran Krishnasamy; Mattias E. Dahlstrom; Jae Sung Rieh; Kathryn T. Schonenberg; Bradly A. Orner; Francois Pagette; Kenneth J. Stein; David C. Ahlgren
The implementation of challenging novel materials and process techniques has led to remarkable device improvements in state-of-the-art high-performance SiGe HBTs, rivaling their III-V compound semiconductor counterparts. Vertical scaling, lateral scaling, and device structure innovations required to improve SiGe HBTs performance have benefited from advanced materials and process techniques developed for next generation CMOS technology. In this work, we present a review of recent process and materials development enabling operational speeds of SiGe HBTs approaching 400 GHz. In addition, we present device simulation results that show the extendibility of SiGe HBT technology performance towards half-terahertz and beyond with further scaling and device structure improvements.
bipolar/bicmos circuits and technology meeting | 2006
Mattias E. Dahlstrom; S. Walter; S. Von Bruns; Ramana M. Malladi; K.M. Newton; Alvin J. Joseph
Transistor mismatch is a key parameter for the design and operation of advanced analog circuits. The paper presents for the first time data from several generations of BiCMOS technology nodes for VBE and current gain (beta) mismatch. The authors show that the 0.12 mum BiCMOS has a 3-a VBE mismatch of 0.63 mV-mum and beta mismatch of 0.24 %-mum. CBE NPNs have essentially the same but slightly lower mismatch than CBEBC NPNs. Very small and very long devices have increased mismatch, especially at high currents. The authors also present a physical model and experimental data showing the influence of the emitter-base Ge slope on the device mismatch
bipolar/bicmos circuits and technology meeting | 2016
Jeff A. Babcock; Joel M. Halbert; Hiroshi Yasuda; Alexei Sadovnikov; Jonggook Kim; Alan Buchholz; Robert Malone; Marco Corsi; Greg Cestra; Mattias E. Dahlstrom
The evolution of silicon and silicon-germanium pnp transistors is reviewed in this paper. The motivation for SiGe-pnp transistors in Complementary Bipolar (CBi) and CBiCMOS is discussed with a view on device parametric parameters that help gage the usefulness of these devices in analog and RF design. We review the basic process architectures and process building blocks for CBiCMOS. SiGe-pnp versus Si-pnp performance metrics are highlighted followed by a discussion on circuit blocks that benefit from having near matched complementary bipolar transistors.
bipolar/bicmos circuits and technology meeting | 2011
Peng Cheng; Mattias E. Dahlstrom; Qizhi Liu; Peter B. Gray; James W. Adkisson; Bjorn Zetterlund; John J. Pekarik; Renata Camillo-Castillo; Ljubo Radic; John J. Ellis-Monaghan; David L. Harame
In this paper, we investigate the emitter resistance R<inf>e</inf> in SiGe HBTs with speeds up to 280GHz, using a U-shaped polysilicon emitter. We observed that R<inf>e</inf> increased with lateral scaling, thereby degrading f<inf>T</inf>. Although a negligible component in the past, in this experiment R<inf>e</inf> * C<inf>cb</inf> transit time delay is playing a more significant role in limiting f<inf>T</inf>. R<inf>e</inf> was modeled to explain the increase due to lateral scaling, and was shown to result from the plugging of the emitter opening by the emitter polysilicon. Furthermore, process experiments were conducted to investigate the effect of emitter polysilicon thickness, sidewall height, and emitter i-layer thickness.
bipolar/bicmos circuits and technology meeting | 2008
Mattias E. Dahlstrom; Renata Camillo-Castillo
Leakage through the base is a common yield detractor in SiGe NPNs. The defects are commonly referred to as dasiapipespsila and are manifested as a current path between emitter and collector independent of base bias. In this article we discuss pipes which have been observed due to retarded base growth. Advanced light/thermally induced voltage alterations (LIVA) and cross section transmission electron microscopy (XTEM) were used to identify these defects, which resulted in leakage paths through the base to the collector. The pipes were found to have resistances ranging 100-200 kOmega, and could be modeled as junction field-effect transistors (JFETs) in which the pipes serve as the channel and the base as the gate electrode. Technology computer-aided design (TCAD) was utilized to model the pipes and provide insight into their behavior. In particular, the higher CE leakage currents of NPNs containing a selective collector implant are explained by changes in the conduction band resulting from the SIC implant. This correlates with observed NPN yield trends.
bipolar/bicmos circuits and technology meeting | 2008
Panglijen Candra; Mattias E. Dahlstrom; Michael J. Zierak; Benjamin T. Voegeli; K. Watson; Peter B. Gray; Zhong-Xiang He; Robert M. Rassel; S. Von Bruns; Nicholas Theodore Schmidt; Renata Camillo-Castillo; R. Previty-Kelly; Michael L. Gautsch; A. Norris; M. Gordon; P. Chapman; Douglas B. Hershberger; J. Lukaitis; Natalie B. Feilchenfeld; Alvin J. Joseph; S. St Onge; James S. Dunn
For the first time, we report a 0.24 mum SiGe BiCMOS technology that offers full suite of active device including three distinct NPNs, a vertical PNP, CMOS supporting three different operating-voltages, and wide range of passive devices. In particular, this technology provides 6.5 V CMOS capability and VPNP with fT/fMAX of 15/14 GHz and BVCEO of 6.5 V which can be used to complement high breakdown NPN with fT of 30 GHz and BVceo of 6.0 V.
Archive | 2006
Marwan H. Khater; Andreas D. Stricker; Bradley A. Orner; Mattias E. Dahlstrom
Archive | 2010
Mattias E. Dahlstrom; Dinh Dang; Qizhi Liu; Ramana M. Malladi