Richard A. John

Chip-to-chip optical interconnects

Terabus is based on a silicon-carrier interposer on an organic card containing 48 polymer waveguides. We have demonstrated 4times12 arrays of low power optical transmitters and receivers, operating up to 20 Gb/s and 14 Gb/s per channel respectively

120-Gb/s VCSEL-based parallel-optical interconnect and custom 120-Gb/s testing station

A 120-Gb/s optical link (12 channels at 10 Gb/s/ch for both a transmitter and a receiver) has been demonstrated. The link operated at a bit-error rate of less than 10/sup -12/ with all channels operating and with a total fiber length of 316 m, which comprises 300 m of next-generation (OM-3) multimode fiber (MMF) plus 16 m of standard-grade MMF. This is the first time that a parallel link with this bandwidth at this per-channel rate has ever been demonstrated. For the transmitter, an SiGe laser driver was combined with a GaAs vertical-cavity surface-emitting laser (VCSEL) array. For the receiver, the signal from a GaAs photodiode array was amplified by a 12-channel SiGe receiver integrated circuit. Key to the demonstration were several custom testing tools, most notably a 12-channel pattern generator. The package is very similar to the commercial parallel modules that are available today, but the per-channel bit rate is three times higher than that for the commercial modules. The new modules demonstrate the possibility of extending the parallel-optical module technology that is available today into a distance-bandwidth product regime that is unattainable for copper cables.

Ge-on-SOI-Detector/Si-CMOS-Amplifier Receivers for High-Performance Optical-Communication Applications

In this paper, an overview and assessment of high-performance receivers based upon Ge-on-silicon-on-insulator (Ge-on-SOI) photodiodes and Si CMOS amplifier ICs is provided. Receivers utilizing Ge-on-SOI lateral p-i-n photodiodes paired with high-gain CMOS amplifiers are shown to operate at 15 Gb/s with a sensitivity of -7.4 dBm (BER=10-12) while utilizing a single supply voltage of only 2.4 V. The 5-Gb/s sensitivity of similar receivers is constant up to 93 degC, and 10-Gb/s operation is demonstrated at 85 degC. Error-free (BER<10-12) operation of receivers combining a Ge-on-SOI photodiode with a single-ended high-speed receiver front end is demonstrated at 19 Gb/s, using a supply voltage of 1.8 V. In addition, receivers utilizing Ge-on-SOI photodiodes integrated with a low-power CMOS IC are shown to operate at 10 Gb/s using a single 1.1-V supply while consuming only 11 mW of power. A perspective on the future technological capabilities and applications of Ge-detector/Si-CMOS receivers is also provided

Is 25 Gb/s On-Board Signaling Viable?

What package improvements are required for dense, high-aggregate bandwidth buses running at data rates beyond 10 Gb/s per channel, and when might optical interconnects on the board be required? We present a study of distance and speed limits for electrical on-board module-to-module links with an eye to answering these questions. Hardware-validated models of advanced organic modules and printed circuit boards were used to explore these limits. Simulations of link performance performed with an internal link modeling tool allowed us to explore the effect of equalization and modulation formats at different data rates on link bit error rate and eye opening. Our link models have been validated with active, high-speed differential bus measurements utilizing a 16-channel link chip with programmable equalization and a per-channel data rate of up to 11 Gb/s. Electrical signaling limits were then determined by extrapolating these hardware-correlated models to higher speeds, and these limits were compared to the results of recent work on on-board optical interconnects.

UV modification of surface pretilt of alignment layers for multidomain liquid crystal displays

Two types of ultraviolet (UV) light induced modification of the surface pretilt of alignment layers are reported. The UV modification allows the liquid crystal (LC) surface pretilt angle of a polyimide film to be selectively altered in a small area. Two device structures for fabricating two‐domain liquid crystal displays based on this selective alteration of the LC surface pretilt angle of polyimides are proposed. Results from 3D simulation show that each pixel splits into two domains for the proposed structures. Experimentally, two‐domain twisted nematic (TN) test panels and thin‐film‐transistor (TFT) addressed two‐domain TN panels were fabricated using this method. The UV modification described in this letter does not require conventional photoresist technology as do other methods of fabricating two domain liquid crystal displays (LCDs). This process is simple as it requires only one polyimide coating and one rubbing step for each substrate.

A 15-Gb/s 2.4-V Optical Receiver Using a Ge-on-SOI Photodiode and a CMOS IC

We report the fastest (15 Gb/s) and lowest voltage (2.4V) all-silicon-based optical receiver to date. The receiver consists of a lateral, interdigitated, germanium-on-silicon-on-insulator (Ge-on-SOI) photodiode wire-bonded to a 0.13-mum complementary metal-oxide-semiconductor (CMOS) receiver integrated circuit (IC). The photodiode has an external quantum efficiency of 52% at lambda=850 nm and a dark current of 10 nA at -2 V. The small-signal transimpedance of the receiver is 91-dBOmega and the bandwidth is 6.6 GHz. At a bit-error rate of 10-12 and lambda=850 nm; the receiver exhibits sensitivities of -11.0, -9.6, and -7.4 dBm at 12.5, 14, and 15 Gb/s, respectively. The receiver operates error-free at rates up to 10 Gb/s with an IC supply voltage as low as 1.5 V and with a photodiode bias as low as 0.5 V. The power consumption is 3 to 7 mW/Gb/s. The Ge-on-SOI photodiode is well suited for integration with CMOS processing, raising the possibility of producing high-performance, low-voltage, monolithically integrated receivers based on this technology in the future

Terabit/s-class 24-channel bidirectional optical transceiver module based on TSV Si carrier for board-level interconnects

We report here on the design, fabrication and characterization of highly-integrated 3-D Optochips consisting of a Si carrier platform with 4 flip-chip attached components: two 24-channel 850-nm optoelectronic (OE) arrays (VCSELs and photodiodes) and two 24-channel CMOS ICs (receivers and laser drivers). The Si carrier incorporates three copper wiring levels for interconnection between the CMOS ICs and the OE arrays, and a dense array of electrical through-silicon-vias (TSVs) for the off-carrier dc and high-speed electrical connections. In addition, to allow optical transmission through the silicon carrier, 150-μm diameter “optical vias” (holes) are etched through the carrier at the locations of the optoelectronic array elements. The ICs and OEs are designed for 10–15 Gb/s operation to provide 48-channel modules with bidirectional aggregate bandwidths of 240 to 360 Gb/s. Optochips based on TSV Si carriers with flip-chip bonded ICs and OEs have been assembled using AuSn solder. DC characterization verified electrically and optically operative Optochips with 24 VCSELs and 24 photodiodes (PDs). Assembly of the Optochips to a high-speed, high-density organic carrier to form the full optical modules has also been developed and demonstrated. The Si carrier TSV technology is key to enabling the bonding of the Optochip to the organic carrier using a C4 solder process. Initial high-speed characterization of the complete module showed receiver channels operating at 12.5 Gb/s and transmitter channels operating up to 15 Gb/s. This is the first demonstration of Terabus optical modules with dense 24 TX + 24 RX transceiver Optochips based on TSV Si carriers.

Low-Power 16 x 10 Gb/s Bi-Directional Single Chip CMOS Optical Transceivers Operating at ≪ 5 mW/Gb/s/link

We report here on a parallel optical transceiver based on a single 0.13 mum CMOS amplifier chip with 16 transmitter and 16 receiver channels. The transceiver is designed to support very low-power, chip-to-chip optical data buses on printed circuit boards at data rates up to 10 Gb/s/channel. Optical interfaces to the chip are provided by 16-channel photodiode (PD) and VCSEL arrays directly flip-chip soldered to the CMOS IC. The resulting complete transceivers, or optochips, are low-cost, low-profile highly-integrated chip-scale components. The packaging approach, dense hybrid-integration of optical devices with CMOS, facilitates further scaling to even larger 2-D arrays for future massively parallel optical data buses. Comparison with a previously reported high-speed transceiver Optochip is provided to provide insight into the design space of dense CMOS-based parallel optical transceivers.

160-Gb/s, 16-Channel Full-Duplex, Single-Chip CMOS Optical Transceiver

We report a single-chip CMOS optical transceiver incorporating sixteen 10-Gb/s transmitter and receiver channels for a 160 Gb/s aggregate bit rate. The transceiver consumes 15.6 mW/Gb/s with an area efficiency of 9.4 Gb/s/mm2 per link.

160-Gb/s Bidirectional Parallel Optical Transceiver Module for Board-Level Interconnects Using a Single-Chip CMOS IC

We report here on the design, fabrication and high-speed performance of a novel parallel optical module with sixteen 10-Gb/s transmitter and receiver channels for a 160-Gb/s bidirectional aggregate data rate. The module utilizes a single-chip CMOS optical transceiver containing both transmitter and receiver circuits. 16-channel high-speed photodiode (PD) and VCSEL arrays are flip-chip attached to the low-power CMOS IC. The substrate emitting/illuminated VCSEL and PD arrays operate at 985 nm and include collimating lenses integrated into the backside of the substrate. The IC-OE assembly is then flip-chip attached to a high density organic package forming the transceiver optical module. The exclusive use of flip-chip packaging for both the IC-to-optoelectronic (OE) devices and for the IC-to-organic package minimizes the module footprint and associated packaging parasitics. The OE-on-IC assembly achieves a high area efficiency of 9.4 Gb/s/mm2 (Schow et al., 2007). The complete organic carrier transceiver package provides a low-cost, low-profile module similar to a conventional chip-carrier that can be directly surface mounted to a circuit board using a conventional BGA solder process. SLC transceiver modules with transmitter and receiver OE-IC arrays were assembled and characterized. Operation of all 16 transmitters in the transceiver module was demonstrated at data rates >10 Gb/s. Similarly, all 16 receiver channels operated error-free at >10 Gb/s. The receiver eye-diagrams were generated using a second transceiver source and therefore constitute a full transceiver optical link.