Rigo Richter

The Flash Memory battle : How low can we go?

With the introduction of the TWINSCAN XT:1900Gi the limit of the water based hyper-NA immersion lithography has been reached in terms of resolution. With a numerical aperture of 1.35 a single expose resolution of 36.5nm half pitch has been demonstrated. However the practical resolution limit in production will be closer to 40nm half pitch, without having to go to double patterning alike strategies. In the relentless Flash memory market the performance of the exposure tool is stretched to the limit for a competitive advantage and cost-effective product. In this paper we will present the results of an experimental study of the resolution limit of the NAND-Flash Memory Gate layer for a production-worthy process on the TWINSCAN XT:1900Gi. The entire gate layer will be qualified in terms of full wafer CD uniformity, aberration sensitivities for the different wordlines and feature-center placement errors for 38, 39, 40 and 43nm half pitch design rule. In this study we will also compare the performance of a binary intensity mask to a 6% attenuated phase shift mask and look at strategies to maximize Depth of Focus, and to desensitize the gate layer for lens aberrations and placement errors. The mask is one of the dominant contributors to the CD uniformity budget of the flash gate layer. Therefore the wafer measurements are compared to aerial image measurements of the mask using AIMSTM 45-193i to separate the mask contribution from the scanner contribution to the final imaging performance.

Impact of alternative mask stacks on the imaging performance at NA 1.20 and above

The lithographic performance of current state-of-the-art resolution enhancement techniques (RET) will become critical at hyper numerical aperture (NA>1) due to mask 3D effects. We have studied the impact of the mask material on the lithographic performance at NA 1.2 and above. The assessment, both by rigorous simulations and experiments, involves the standard mask stacks, Cr binary mask (BIM) and MoSi 6% attenuated phase shift mask (attPSM), as well as alternatives such as thick Cr BIM, Ta/SiO2 1% and 6% attenuated PSM, and Ta/SiON 1% attenuated PSM. Using the rigorous electro-magnetic field (EMF) and lithographic process simulations (IISB DrLiTHO) the mask structure is optimized taking into account the trade_off with mask error enhancement factor (MEEF). Next, a throughpitch evaluation of the 45nm half-pitch (HP) node at NA1.2-1.35 is carried out examining maximum exposure latitude (EL), depth-of-focus (DOF), best focus shifts, and MEEF behavior for the various mask stacks. For the validation of the simulation methodology a correlation is made between scanner (ASML XT:1700Fi), AIMS (Zeiss AIMSTM45-193i), and simulation results indicating the importance of the mask quality and mask properties. Based on the lithographic performance and the mask manufacturability we put together a ranking of the commercially available mask stacks for the 45nm HP node at NA 1.2 and 1.35.

The imaging performance of Flash Memory masks characterized with AIMS

Flash memory is an important driver of the lithography roadmap, with its dramatic acceleration in dimensional shrink, pushing for ever smaller feature sizes. The introduction of hyper-NA immersion lithography has brought the 45nm node and below within reach for memory makers using single exposure. At these feature sizes mask topology and the material properties of the film stack on the mask play an important role on imaging performance. Furthermore, the break up of the array pitch regularity in the NAND-type flash memory cell by two thick wordlines and a central space, leads to feature-center placement (overlay) errors, that are inherent to the design. An integral optimization approach is needed to mitigate these effects and to control both the CD and placement errors tightly. In this paper we will show that aerial image measurements at mask-level are useful for characterizing the gate layer of a NAND-Flash design before exposure. The aerial image measurements are performed with the AIMSTM 45-193i. and compared to CD measurements on the wafer obtained with an XT:1900Gi hyper-NA immersion system. An excellent correlation is demonstrated for feature-center placement errors and CD variations across the mask (see Figure 1) for several features in the gate layer down to 40nm half pitch. This shows the potential to use aerial image measurements at mask-level in combination with correction techniques on the photomask, like the CDC200 tool in combination with exposure tool correction techniques, such as DoseMapperTM, to improve both across field and across wafer CD uniformity of critical layers.

First results for hyper NA scanner emulation from AIMS 45-193i

Immersion lithography offers the semiconductor industry the opportunity to extend current ArF processes before switching to shorter wavelengths. As numerical apertures of scanners for hyper NA move above 1.0 with immersion lithography, increased attention must be paid to the photomask or reticle and its wafer printability. Feature sizes on the photomask become increasingly critical as they behave more like partial wire grid polarisers, as they become comparable to, or smaller than the wavelength. Besides challenges to address reticle polarisation effects, lithographers must also consider the polarisation state of the illumination and subsequently the contrast loss for light with a TM polarisation state. Such an effect, also called the vector effect, is caused by the increasing angle of incidence of the diffracted light for larger numerical apertures on the scanner. Therefore, for wafer printing using hyper NA scanners, the industry consensus is that TE polarised illumination must be used to meet the stringent requirements of imaging contrast. In this paper, initial results of measurements using the optical test stand and the alpha tool of a completely new AIMSTM tool for the 45nm node will be presented. The system covers all aspects of immersion and polarisation lithographic emulation. Measurements have been made on binary and phase shift masks with different sizes of features and on programmed defects.

Wafer level CD metrology on photomasks using aerial imaging technology

Recently more and more mask designs for critical layers involve strong OPC which increases the complexity for standard CD SEM mask measurements and conclusive interpretation of results. For wafer printing the wafer level CD is the crucial measure if the mask can be successfully used in production. Recent developments in the AIMSTM software have enabled the user to use the tool for wafer level CD metrology under scanner conditions. The advantage of this methodology is that AIMSTM does see the CD with scanner eyes. All lithographic relevant effects like OPC imaging which can not be measured by other tools like mask CD SEM will be captured optically by the AIMSTM principle. Therefore, measuring the CD uniformity of the mask by using AIMSTM will lead to added value in mask metrology. With decreasing feature sizes the requirements for CD metrology do increase. In this feasibility study a new prototype algorithm for measuring the lithographically relevant AIMSTM CD with sub pixel accuracy has been tested. It will be demonstrated that by using this algorithm line edge and line width roughness can be measured accurately by an AIMSTM image. Furthermore, CD repeatability and tool matching results will be shown.

Semi-automated repair verification of aerial images

Using aerial image metrology to qualify repairs of defects on photomasks is an industry standard. Aerial image metrology provides reasonable matching of lithographic imaging performance without the need for wafer prints. Utilization of this capability by photomask manufacturers has risen due to the increased complexity of layouts incorporating RET and phase shift technologies. Tighter specifications by end-users have pushed aerial image metrology activities to now include CD performance results in addition to the traditional intensity performance results. Discussed is the computer implemented semi-automated analysis of aerial images for repair verification activities. Newly designed user interfaces and algorithms could guide users through predefined analysis routines as to minimize errors. There are two main routines discussed here, one allowing multiple reference sites along with a test/defect site on a single image of repeating features. The second routine compares a test/defect measurement image with a reference measurement image. This paper highlights new functionality desirable for aerial image analysis as well as describes possible ways of its realization. Using structured analysis processes and innovative analysis tools could lead to a highly efficient and more reliable result reporting of repair verification metrology.

New analysis tools and processes for mask repair verification and defect disposition based on AIMS™ images

Using AIMSTM to qualify repairs of defects on photomasks is an industry standard. AIMSTM images match the lithographic imaging performance without the need for wafer prints. Utilization of this capability by photomask manufacturers has risen due to the increased complexity of layouts incorporating RET and phase shift technologies. Tighter specifications by end-users have pushed AIMSTM analysis to now include CD performance results in addition to the traditional intensity performance results. Discussed is a new Repair Verification system for automated analysis of AIMSTM images. Newly designed user interfaces and algorithms guide users through predefined analysis routines as to minimize errors. There are two main routines discussed, one allowing multiple reference sites along with a test/defect site within a single image of repeating features. The second routine compares a test/defect measurement image with a reference measurement image. Three evaluation methods possible with the compared images are discussed in the context of providing thorough analysis capability. This paper highlights new functionality for AIMSTM analysis. Using structured analysis processes and innovative analysis tools leads to a highly efficient and more reliable result reporting of repair verification analysis.

AIMS mask qualification for 32nm node

Moving forward to 32nm node and below optical lithography using 193nm is faced with complex requirements to be solved. Mask makers are forced to address both Double Patterning Techniques and Computational Lithography approaches such as Source Mask Optimizations and Inverse Lithography. Additionally, lithography at low k1 values increases the challenges for mask repair as well as for repair verification and review by AIMSTM. Higher CD repeatability, more flexibility in the illumination settings as well as significantly improved image performance must be added when developing the next generation mask qualification equipment. This paper reports latest measurement results verifying the appropriateness of the latest member of AIMSTM measurement tools - the AIMSTM 32-193i. We analyze CD repeatability measurements on lines and spaces pattern. The influence of the improved optical performance and newly introduced interferometer stage will be verified. This paper highlights both the new Double Patterning functionality emulating double patterning processes and the influence of its critical parameters such as overlay errors and resist impact. Beneficial advanced illumination schemes emulating scanner illumination document the AIMSTM 32-193i to meet mask maker communitys requirements for the 32nm node.

Characterizing the imaging performance of flash memory masks using AIMS

Flash memory has become one of the most important segments of the semiconductor industry in recent years. Flash memory is also an important driver of the lithography roadmap, with its dramatic acceleration in dimensional shrink, pushing for ever smaller feature sizes. The introduction of the XT:1700Fi and XT:1900Gi have brought the 45nm node and below within reach for memory makers. At these feature sizes mask topology and the material properties of the film stack on the mask play an important role on imaging performance. Furthermore, the break up of the array pitch regularity in the NAND-type flash memory cell by two thick wordlines and a central space, leads to feature-center placement (overlay) errors, that are inherent to the design. An integral optimization approach is needed to mitigate these effects and to control both the CD and placement errors tightly. In this paper we will present the results of aerial image measurements on mask level of a NAND-Flash Memory Gate layer using AIMSTM 45-193i. Various imaging relevant parameters, such as MEEF, EL, DoF and placement errors are measured for different mask absorber materials for features sizes ranging from 39nm half pitch to 41nm half pitch design rule on wafer level. The AIMSTM measurements are compared to experimental results obtained with a XT:1900Gi hyper-NA immersion system. Mask optimization strategies are sought to increase Depth of Focus and minimize feature-center placement errors.

Programmed defects study on masks for 45nm immersion lithography using the novel AIMS 45-193i

Mask manufacturing for the 45nm node for hyper NA lithography requires tight defect and printability control at small features sizes. The AIMSTM1 technology is a well established methodology to analyze printability of mask defects, repairs and critical features by scanner emulation. With the step towards hyper NA imaging by immersion lithography the AIMSTM technology has been faced with new challenges like vector effects, polarized illumination and tighter specs for repeatability and tool stability. These requirements pushed the development of an entirely new AIMSTM generation. The AIMSTM 45-193i has been designed and developed by Carl Zeiss to address these challenges. A new mechanical platform with a thermal and environmental control unit enables high tool stability. Thus a new class of specification becomes available. The 193nm optical beam path together with an improved beam homogenizer is dedicated to emulate scanners up to 1.4 NA. New features like polarized illumination and vector effect emulation make the AIMSTM 45- 193i a powerful tool for defect disposition and scanner emulation for 45nm immersion lithography. In this paper results from one of the first production tools will be presented. Aerial images from phase shifting and binary masks with different immersion relevant settings will be discussed. Also, data from a long term repeatability study performed on masks with programmed defects will be shown. This study demonstrates the tools ability to perform defect disposition with high repeatability. It is found that the tool will fulfill the 45nm node requirements to perform mask qualification for production use.