Rita Van Hoof

Simultaneous Optimization of the Material Properties, Uniformity and Deposition Rate of Polycrystalline CVD and PECVD Silicon-Germanium Layers for MEMS Applications

The deposition rate is significantly enhanced by utilizing a plasma-enhanced chemical vapor deposition (PECVD) method. This method produces however an amorphous SiGe deposition. To induce crystallization in the bulk PECVD layer it has to be deposited on top of a chemical vapor deposited (CVD) SiGe layer [4] which in itself is deposited on top of a thin PECVD seed layer (see Fig 1). The purpose of the PECVD seed layer is to minimize the incubation time. The CVD and PECVD depositions are performed sequentially in an Applied Materials Centura CxZ chamber.

SiGe MEMS technology: a platform technology enabling different demonstrators

In imecs 200mm fab a dedicated poly-SiGe above-IC MEMS (Micro Electro-Mechanical Systems) platform has been set up to integrate MEMS and its readout and driving electronics on one chip. In the Flemish project Gemini the possibilities of this platform have been further explored together with the project partners. Three different demonstrators were realized: mirrors for display applications, grating light valves (GLV) and accelerometers. Whereas the mirrors and GLVs are made with a similar to 300 nm thick SiGe structural layer plus optical coating, the SiGe structural layer thickness for the accelerometers is 4 mu m in order to improve the capacitive readout of in-plane devices. The processing and measurement results of these functional demonstrators are shown in this paper. These new demonstrators reconfirm the generic nature of the SiGe MEMS platform.

Improvement of PECVD Silicon–Germanium Crystallization for CMOS Compatible MEMS Applications

This paper investigates the influence of the electrode spacing, chamber pressure, total gas flow, and H 2 dilution on the crystallinity, resistivity, uniformity, and stress of polycrystalline silicon-germanium (poly-SiGe) films grown by plasma-enhanced chemical vapor deposition (PECVD). Boron-doped PECVD SiGe films of 1.6 μm thick are deposited on 400 nm chemical vapor deposition layers from SiH 4 , GeH 4 , and B 2 H 6 precursors. The microstructure is verified by transmission electron microscopy and by X-ray diffraction. It was discovered that for constant temperature and deposition rate, the PECVD SiGe microstructure changes from completely amorphous to polycrystalline by increasing the electrode spacing and pressure due to reduced ion bombardment. A process window of an electrode spacing and pressure for the PECVD poly-SiGe deposition is thus identified based on a sheet resistance mapping method. Increasing the total gas flow dramatically improves the within-wafer crystallinity variation and further reduces the resistivity. Increasing the H 2 flow during PECVD shifts the stress from -51 to 17 MPa and further reduces the crystallinity variation over the wafer. In addition, the effect of changing the SiH 4 to GeH 4 ratio and the in situ boron doping by adding B 2 H 6 is also investigated. The findings in this paper are expected to facilitate the use of poly-SiGe in the above complementary metal oxide semiconductor (CMOS) microelectromechanical system (MEMS) applications.

Development, Optimization and Evaluation of a CF4 Pretreatment Process to Remove Unwanted Interfacial Layers in Stacks of CVD and PECVD Polycrystalline Silicon-Germanium for MEMS Applications

Due to the requirements of low deposition temperatures (≤ 460 °C) and thicknesses of up to 10 μm for MEMS applications, the deposition rate must be enhanced by utilizing a PECVD (Plasma Enhanced Chemical Vapor Deposition) process. This method typically produces however an amorphous SiGe deposition at 460 °C or below [4]. One method of inducing polycrystallization in the bulk PECVD layer is to deposit it on top of a thin (~400 nm) polycrystalline CVD (Chemical Vapor Deposition) SiGe seed layer [5]. In this way the polycrystallinity of the CVD SiGe seed layer is transferred into the PECVD SiGe layers. This effect is illustrated in Figure 1 (bottom PECVD layer).

Wafer Level Characterization of the Sacrificial HDP Oxide Lateral Etching by Anhydrous Vapor HF with Ethanol Vapor for SiGe MEMS Structures

In this work the lateral etching of a 3μm thick blanket HDP oxide covered with a 1μm patterned SiGe layer by AVHF with ethanol vapor is investigated (Fig. 1–a). An extensive DoE (Design of Experiment) is carried out to explore the influence of the main Primaxx CET (Clean Etch Technology) tool parameters (Table 1) on lateral ER (Etch Rate) and WiWU (Within Wafer Uniformity). The lateral etching is characterized at wafer level with automated tools. This will replace the current manual die to die inspection with an optical microscope after removing the SiGe layer by sticky tapes. The SiGe layer has to be removed for optical analysis due to its non-transparent nature.

Apparent and steady-state etch rates in thin film etching and under-etching of microstructures: II. Characterization

The apparent and steady-state etch rates of PECVD SiO2, HDP SiO2 and PECVD Si3N4 are measured both in a single thin film and a stacked film configuration. This is done for a HF:H2O/1:1, a HF:IPA/1:1 and a BHF solution. It is shown that etch rates vary with the used etch time, confirming the influence of both an incubation and a rinsing period on the average etch rate when performing typical ex situ etch rate experiments. Hence, this second part of a set of two papers provides the experimental evidence for part I where a general etch rate model was proposed. Furthermore this work shows that the etch rate varies whether it is determined on a single layer, in a stacked configuration or while under-etching a structural layer. This confirms the need of a straightforward characterization method for under-etching measurements at the sacrificial release stage of MEMS fabrication processes. Therefore, a new characterization method, using a suspended beam array and a surface profilometer, is proposed to determine the amount of under-etch after sacrificial release of surface micromachined devices.

Physical loss mechanisms for resonant acoustical waves in boron doped poly-SiGe deposited with hydrogen dilution

In this paper, the physical loss mechanisms in boron doped poly-SiGe are analyzed theoretically and experimentally. The phonon losses were calculated theoretically for different germanium and doping concentrations. The theoretical analysis showed that Akhiezer damping sets a fundamental lower limit to the internal damping. Calculated limits for the f×Q due to Akhiezer damping were ∼1×1014 Hz for SiGe with low Ge content and ∼2×1013 Hz for SiGe with high Ge content. However, in the experiments it was found that an internal friction loss mechanism limits the maximum achievable f×Q in our material to 3×1012 at a frequency of 130 MHz. Experimentally the loss mechanisms were studied further by preparing SiGe layers with different Ge/H/B content. The acoustical losses were measured by fabricating a micromechanical resonator from the layers. The measurements identified a thermally activated loss mechanism. By studying the microstructure of the SiGe layers, we identified interface defects and interstitial as the ...

Stacked Boron Doped Poly-Crystalline Silicon-Germanium Layers: an Excellent MEMS Structural Material

In this work stacked boron doped poly-crystalline Silicon-Germanium (poly-SiGe) layers, which can be applied as structural MEMS layers, were studied. A standard 1 µm base layer, deposited at 480 oC chuck temperature, is stacked until the required thickness (e.g. 10 x for a 10 µm thick layer). This 1 µm base layer consists of a PECVD seed layer (+/− 75 nm), a CVD crystallization layer (+/− 135 nm) and a PECVD layer to achieve the required thickness with a high growth-rate. The top part of this PECVD layer can optionally be used for optimizing the stress gradient by a stress compensation layer. This approach resulted in 4 µm thick poly-SiGe MEMS structural layers with low tensile stress (50 MPa), low resistivity (2 mΩcm) and a low strain gradient ( −5 /µm).