Soichi Yamazaki

Chemical Vapor Deposition of Ru and Its Application in (Ba,Sr)TiO3 Capacitors for Future Dynamic Random Access Memories

Ru films were fabricated by chemical vapor deposition using Ru(C5H5)2 and O2. The deposition of Ru film was controlled by the surface reaction kinetics as the rate limiting step with activation energy of 2.48 eV below 250°C and by the mass transport process above 250°C. Ru films had a polycrystalline structure and showed low resistivity of about 12 µΩcm. Ru films deposited at 230°C showed excellent step coverage. We applied Ru films prepared by chemical vapor deposition to the bottom electrode of a Ba0.25Sr0.75TiO3 capacitor and obtained good electrical characteristics.

Characteristics of (Ba, Sr)TiO3 Capacitors with Textured Ru Bottom Electrode

Ru films were fabricated by dc magnetron sputtering in an Ar/O2 mixture ambient in order to examine the Ru films as electrodes of Ba0.5Sr0.5TiO3 (BST) thin-film capacitors. The 100-nm-thick Ru film deposited on Si at 450?C at an O2/(Ar+O2) flow ratio of 40% at 0.5 kW was textured along c-axis. The full-width at half maximum (FWHM) of 3.14? was obtained for the Ru (002) diffraction peak in an X-ray diffraction (XRD) pattern. BST films deposited on the Ru bottom electrode were also textured along (110). The relative dielectric constant of BST films increased with a decrease in the FWHM of BST (110). The relationship between electrical properties of Ru/BST/Ru capacitors and the orientation of the Ru bottom electrode and BST films was also investigated.

Low temperature (<500/spl deg/C) SrTiO/sub 3/ capacitor process technology for embedded DRAM

We have developed low temperature SrTiO/sub 3/ (ST) capacitor process for embedded DRAM. ST film deposited at 475/spl deg/C was crystallized without additional annealing. 0.53nm SiO/sub 2/ equivalent thickness (teq) ST capacitor with Ru electrodes was obtained. The leakage current of the concave structure capacitor was less than 1fA/cell at /spl plusmn/0.8V for 256K 3-dimensional (3D) capacitors fabricated by the low temperature ST process. ST capacitor process can satisfy demands on lower processing temperature and scalability to very thin dielectric layer with low leakage current.

Hot-wall batch-type CVD tool for high-k (Ba,Sr)TiO/sub 3/ capacitors

A hot-wall batch type BST-CVD tool with fast thermal processing (FTP) furnace and individual vaporizing liquid source supply system (ILSS) was developed for uniform deposition of BST. We also employed an in-situ multi-step (IMS) process that is sequential repetition of thin amorphous BST deposition and its crystallization in the same reactor to reconcile conformal BST deposition and good electrical performances. BST deposited by our hot-wall CVD shows slight substrate dependence (metal coated or not), therefore hotwall CVD is superior to a single slice tool for reduction of test wafer running. IMS deposited BST shows almost 100% step coverage, lower carbon impurity concentration than single step deposited BST and sufficient electrical characteristics (leakage current <10/sup -7/ A/cm/sup 2/, Teq<0.5 nm) for both SRO and Ru electrodes.

Key process technology for high density 64M FeRAM and beyond

Difficulty to achieve high density FeRAMs with sub-micron ferroelectric capacitors is widely understood due to damage to the capacitors. Key process techniques such as high quality ferroelectric film deposition, electrode preparation, capacitor RIE and hydrogen barrier structure formation are introduced for 64M FeRAMs with sub micron high reliability PZT capacitors.

Effective Orientation Control of Pb(Zr0.4Ti0.6)O3 Thin Films Using A New Ti/Pb(Zr0.4Ti0.6)O3 Seeding Layer

The effect of thin Ti/PbZr 0.4 Ti 0.6 O 3 seed layers on the properties of PbZr 0.4 Ti 0.6 O 3 (PZT) capacitors has been investigated. The seed layer is based on a bi-layer of thin Ti and thin PZT with a total thickness ranging from 10 to 25 nm, which was deposited on Ir/Pt or Ir/IrO 2 /Pt by sputtering. After crystallization of the seed layers the main 130-nm-thick PZT film was deposited and crystallized. As a result, a highly preferred (111)-orientation of the PZT was obtained on a 10-nm-thick seed layer, where the peak intensity ratios of (111)/{100} and (111)/{110} are about 100 and 20, respectively. The 10-nm-thick seed forms a pyrochlore phase with a very smooth surface, where the formation of the pyrochlore phase is attributed to Pb diffusion, resulting in a Pb deficient stoichiometry. The seed layer transformed to the perovskite phase during the main PZT crystallization. It is shown that an IrO 2 layer beneath the Pt can prevent Pt layer degradation related to the volume expansion due to the oxidation of Ir during the main PZT crystallization. Capacitors with the 10-nm-thick seed layer fabricated on the Ir/Pt and Ir/IrO 2 /Pt substrates showed typical 2 Pr values of 44.0 μC/cm 2 and 41.2 μC/cm 2 , respectively. The voltage found for 90%-polarization saturation is about 3.0 V, and the capacitors are fatigue-free at least up to 10 10 switching cycles.

Cylindrical Ru-SrTiO/sub 3/-Ru capacitor technology for 0.11 /spl mu/m generation DRAMs

We have developed a cylindrical Ru/ST/Ru capacitor for gigabit-scale DRAMs. Using cylindrical CVD-Ru as a storage node (SN), a new 2-step CVD-ST was employed to improve ST step coverage, surface morphology and to control composition at the Ru/ST interface. A SiO/sub 2/ equivalent thickness (t/sub eq/) of 0.6 nm and cell capacitance of 18 fF/cell with leakage current of 0.1 fA/cell at /spl plusmn/0.7 V applied voltage has been achieved on a 256K cylindrical Ru/ST/Ru capacitor array.

In-situ multi-step (IMS) CVD process of (Ba,Sr)TiO/sub 3/ using hot wall batch type reactor for DRAM capacitor dielectrics

We developed a new in-situ multi-step (IMS) process technology to achieve both conformal step coverage and high dielectric constant for CVD-BST. IMS is a sequential repetition of low temperature CVD of BST and its crystallization in a batch type hot wall reactor that enables uniform BST deposition over 200 mm wafers. Conformal growth of local epitaxially grown BST with a dielectric constant of more than 300 is attained by IMS combined with SrRuO/sub 3/ electrodes.