Takamitsu Ishihara

Comprehensive Understanding of Electron and Hole Mobility Limited by Surface Roughness Scattering in Pure Oxides and Oxynitrides Based on Correlation Function of Surface Roughness.

A new model of the roughness correlation function S(r) has been proposed in order to explain the different behavior of high field mobility limited by surface roughness scattering, µSR, between electrons and holes in metal oxide semiconductor field effect transistors (MOSFETs) with oxynitrides. It has been shown, for the first time, that the change in electron and hole µSR associated with NO oxynitridation can be reasonably well explained by the appropriate choice of the form of S(r).

Influence of dielectric constant distribution in gate dielectrics on the degradation of electron mobility by remote Coulomb scattering in inversion layers

It has been reported that mobility in high-/spl kappa/ gate dielectric metal-insulator semiconductor field-effect transistors is lower than that in conventional metal-oxide semiconductor field-effect transistors and the reason for this degradation has been considered to be the fixed charge in dielectric films as well as remote phonon scattering. We investigated the influence of dielectric constant distribution in gate dielectrics on electron mobility determined by remote Coulomb scattering (/spl mu//sub RCS/) using numerical simulations and a physical model. It is shown that electron mobility in the inversion layer is strongly affected by the dielectric constant distribution in gate dielectrics. In the case of stacked-gate dielectrics of a high-/spl kappa/ film and an interfacial layer, mobility has a minimum as the dielectric constant of the interfacial layer increases while it increases virtually monotonically with dielectric constant of the high-/spl kappa/ film. These phenomena are explained, considering the electrical potential in the substrate induced by fixed charges in gate dielectrics using the Born approximation. Preferable dielectric constant distribution is presented in terms of the suppression of the remote Coulomb scattering.

Effect of gate impurity concentration on inversion-layer mobility in MOSFETs with ultrathin gate oxide layer

In this paper, the influence of poly-Si-gate impurity concentration, N/sub poly/, on inversion-layer electron mobility is experimentally investigated in MOSFETs with ultrathin gate oxide layer. The split capacitance-voltage C-V method is modified to directly measure an effective mobility, paying attention to both 1) accurate current-voltage I-V and capacitance-voltage (C-V) measurements with high gate leakage current and 2) correct surface carrier density, N/sub s/, estimation at a finite drain bias. It is demonstrated that the mobility in ultrathin gate oxides becomes low significantly for highly doped gate, strongly suggesting the contribution of remote Coulomb scattering due to the gate impurities, which is quantitatively discriminated from that of Coulomb scattering due to substrate impurities and interface states. It is also found that the mobility lowering becomes significant rapidly at T/sub ox/ of 1.5 nm or less. The mobility-lowering component is weakly dependent on N/sub s/, irrespective of N/sub poly/, which cannot be fully explained by the existing theoretical models of remote impurity scattering.

Unified roughness scattering model incorporating scattering component induced by thickness fluctuations in silicon-on-insulator metal-oxide- semiconductor field-effect transistors

A unified model of roughness scattering in single-gate silicon-on-insulator metal–oxide–semiconductor field-effect transistors is proposed based on a formulation suitable for perturbation theory. This unified model includes the roughness scattering model both in bulk MOSFETs and in thin SOI MOSFETs. The SOI-thickness-fluctuation-induced scattering component is naturally derived from the proposed roughness scattering model. The experimentally observed dependence of inversion layer mobility on SOI thickness in thin SOI MOSFETs is explained well by the proposed roughness scattering model.

Modeling of screening effect on remote coulomb scattering due to gate impurities by nonuniform free carriers in poly-Si gate

Remote Coulomb scattering due to gate impurities in poly-Si gate is examined by considering the screening effect due to free carriers in the poly-Si gate. A physics-based screening model, which enables inclusion of the nonuniform carrier distribution in the poly-Si gate into the evaluation of remote Coulomb scattering with high accuracy, is proposed. Based on the proposed screening model, the effect of the nonuniform carrier distribution in the poly-Si gate on the mobility limited by remote Coulomb scattering, μRCS, is quantitatively examined. It is shown that the screening model using the averaged carrier distribution in the poly-Si gate cannot provide the correct description of the behavior of μRCS and the inclusion of the nonuniformity of the carrier distribution is essential for the quantitative evaluation of μRCS.

Unified Transient and Frequency Domain Noise Simulation for Random Telegraph Noise and Flicker Noise Using a Physics-Based Model

Unified transient and frequency domain noise simulation of random telegraph noise and flicker noise is conducted using a multiphonon-assisted model that considers tunneling probabilities and energy transitions of discretized traps in the gate insulator of MOSFETs. The proposed model is able to concurrently represent the dynamic behavior of electron and hole trapping and detrapping via interactions with both the Si substrate and Poly-Si gate. The model is implemented in a 3-D device simulator to examine the effect of device structure and bias conditions. The conventional analytical model does not precisely estimate the noise powers in short-channel MOSFETs due to the nonuniform trapped charge effect. The high trap density near the shallow trap isolation edges is predicted quantitatively by comparing the measured data with the simulated data. In conclusion, we confirm the validity of the developed unified simulator and its usefulness for gaining insights into trap sites and noise reduction engineering.

Quantitative Examination of Mobility Lowering Associated with Ultrathin Gate Oxides in Silicon Metal-Oxide-Semiconductor Inversion Layer

In this study, mobility lowering inherent to ultrathin gate oxides is experimentally examined in the silicon metal-oxide-semiconductor (Si MOS) inversion layer, and additional scattering mechanisms associated with gate oxide scaling are discussed, paying attention to the extraction of reliable experimental data on inversion-layer mobility. It is found that poly-Si-gate impurity concentration strongly affects the mobility lowering associated with ultrathin gate oxides, which is quantitatively discriminated from that of Coulomb scattering due to substrate impurities and interface states. This finding indicates the contribution of remote Coulomb scattering due to the gate impurities. In addition, low-temperature measurements reveal that roughness scattering is enhanced, possibly because of the poor Si/SiO2 interface in the initial stage of oxide growth. Therefore, further gate oxide scaling down to 1.5 nm or less can cause remote Coulomb scattering as well as enhanced roughness scattering, resulting in the saturation or decrease in the drive current capability.

Intrinsic correlation between mobility reduction and V t shift due to interface dipole modulation in HfSiON/SiO 2 stack by La or Al addition

Intrinsic correlation between mobility reduction by remote Coulomb scattering (RCS) and threshold voltage shift (DeltaVt), both of which are induced by interface dipole modulation at high-k/SiO2 interface, is investigated. Three types of dipole modulation are examined; Al addition, La addition, and changing quality of interfacial SiO2 layer. Extrinsic scattering components due to increases of interface state and surface roughness are extracted and separated. It is found that RCS due to interface dipole modulation by Al addition increases with increasing DeltaVt, while that by La addition is constant, independent of DeltaVt. Inevitability of additional scattering for DeltaVt is discussed based on two different models for dipole formation mechanisms.

New findings on inversion-layer mobility in highly doped channel Si MOSFETs

Inversion-layer mobility in highly doped channel Si MOSFETs was investigated. It was found, for the first time, substrate Coulomb scattering (mu_sub) has anomalous surface carrier density (N _S) dependence when acceptor concentration (N_A) becomes larger than 2times10¹⁸ cm^-3. The mu _sub behavior can be explained by the suppression of the screening effect. In addition, interface Coulomb scattering (mu_it) has stronger N_S dependence than ever reported. The mu_it behavior can be explained in terms of the relative distance between the surface carriers and interface states. Influence of high channel doping on MOS interface barrier height was also studied

Low Gate-Induced Drain Leakage and Its Physical Origins in Si Nanowire Transistors

Gate-induced drain leakage (GIDL) in Si nanowire transistors fabricated on silicon-on-insulator substrates is systematically studied. In narrow nanowire transistors, GIDL current is obtained by relatively small potential difference between the gate and the drain due to the superior electrostatic control by gate voltage. On the other hand, variation of GIDL current with gate voltage is drastically reduced in nanowire transistors with the wire width of around 10 nm, which realizes devices with extremely small off-current. The reduction of local electric field around the drain junction due to low impurity concentration in source/drain extensions and the relatively large source/drain parasitic resistance are identified as the main mechanisms of small GIDL current.