Tomonori Okudaira
Mitsubishi
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Publication
Featured researches published by Tomonori Okudaira.
international electron devices meeting | 1990
Yoshinori Okumura; Masayoshi Shirahata; Tomonori Okudaira; Atsushi Hachisuka; Hideaki Arima; Takayuki Matsukawa; N. Tsubouchi
A novel source-to-drain nonuniformly doped channel (NUDC) MOSFET was investigated theoretically and experimentally. Using an analytical model, it is verified that the mobility of the NUDC MOSFET is increased as compared with that of the conventional channel MOSFET. Also, the V/sub th/ lowering of the NUDC MOSFET is suppressed as compared with that of the conventional channel MOSFET. The NUDC MOSFET was fabricated by the oblique rotating ion implantation technique, and the theoretical predictions were confirmed experimentally.<<ETX>>
international electron devices meeting | 1990
Hideaki Arima; Atsushi Hachisuka; T. Ogawa; Tomonori Okudaira; Yoshinori Okumura; Kaoru Motonami; Takayuki Matsukawa; N. Tsubouchi
The authors propose a novel stacked capacitor cell with dual cell plate (DCP cell) for 64-Mb DRAMs. The major advantage of this cell is that the dual cell plates completely surround the whole surface of the storage polysilicon, and the storage capacitance of this cell increases significantly compared to the conventional stacked capacitor cell. For a 1.3- mu m/sup 2/ cell, the DCP cell should achieve a storage capacitance of more than 25 fF. The experimental results indicate that the DCP cell can realize the 64-Mb DRAMs and 1.3- mu m/sup 2/ cell area using the 0.3- mu m design rule.<<ETX>>
international electron devices meeting | 1998
Yoshikazu Tsunemine; Tomonori Okudaira; Keiichiro Kashihara; K. Hanafusa; A. Yutani; Y. Fujita; M. Matsushita; H. Itoh; H. Miyoshi
A novel process technology to realize a thick Pt bottom electrode is developed, particularly for facilitating the use of sputter-BST capacitors. The sputter-BST capacitor fabricated with this technology gives a production-worthy yield and maintains initial electrical properties after finishing the back-end process, including the Al wiring and the plasma SiN-passivation. By using this technology, it is feasible to obtain a reliable BST capacitor in the 0.16 /spl mu/m-geometry, with the achievement of BSTs Teq, SiO/sub 2/-equivalent thickness, of 0.40 nm and a 300 nm-high bottom electrode.
Archive | 1995
Keiichiro Kashihara; Tomonori Okudaira; Hiromi Itoh
Archive | 1995
Akimasa Yuuki; Takaaki Kawahara; Tetsuro Makita; Mikio Yamamuka; Koichi Ono; Tomonori Okudaira
Archive | 1994
Tomonori Okudaira; Takeharu Kuroiwa; Nobuo Fujiwara; Keiichiro Kashihara
Archive | 1994
Tomonori Okudaira; Takeharu Kuroiwa
Archive | 1994
Tomonori Okudaira; Keiichiro Kashihara
Archive | 1993
Hideaki Arima; Makoto Ohi; Natsuo Ajika; Atsushi Hachisuka; Tomonori Okudaira
Archive | 1991
Masao Nagatomo; Hiroki Shimano; Tomonori Okudaira; Yoshinori Okumura