B. Rauber

A stage-bypass SOI-CMOS switch for multi-mode multi-band applications

A double-pole double-throw SOI CMOS switch is presented, which can be exploited to bypass a power stage in a radio transmitter with the aim of improving efficiency in applications requiring transmit power control. The switch is designed through transistors stacking. It is able to manage up to a 35 dBm input power with less than 0.35 dB insertion loss from 500 MHz through 3 GHz. A series-shunt topology allows a better than 40 dB isolation to be obtained in high-power mode. Wide bandwidth and high linearity make the switch suitable for multi-standard front end.

High current 3D symmetrical inductor integrated in an advanced HR SOI CMOS technology targeting RF power applications

During past years, High Resistivity (HR) SOI CMOS technology has emerged as a promising one for the integration of RF applications, mainly because of the improvement of passive component related to HR substrate. In this trend, 3D symmetrical inductor (3DSI) has been proposed on SOI to lower the amount of area consumed by inductor while offering comparable performances than equivalent bulk technology. Recently 3DSI performances have been improved using generalized Group Cross layout (3DGCSI) technique [1]. Unfortunately in advanced CMOS technology 3D inductor architecture suffer from limited current capability since they use the lower levels of the BEOL (which are thinner). This paper presents a novel class of High Current 3DSI (HC3DSI) aiming to resolve this issue by offering at the same time a compact form factor and high current capability. Measurement data of 3DGCSI and HC3DSI are compared with each other to investigate the advantages of this new inductor structure.

High resistivity SOI CMOS technology for multi-standard RF frontends

SOI technology is now emerging as a promising one for the integration of RF front-end modules, mainly for antenna switches and power amplifiers (PAs). This paper reviews the performances of STMicroelectronics 0.13 mum High Resistivity (HR) SOI CMOS technology and discusses the potentiallity for SOI technology to capture RF front-end business in the near future.

Integration of multi-standard front end modules SOCs on high resistivity SOI RF CMOS technology

RF front end modules (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, we see significant research concerning FEM integration on silicon [1]. In this quest, SOI technology has already addressed two key blocks, the antenna switch and the power amplifier. In this paper, we will focus our investigation on high performance passive functions in order to demonstrate the capability of SOI CMOS technology to integrate the whole FEM. To do so, balun, harmonic filter, diplexer and directional coupler have been achieved in a 130 nm SOI CMOS technology. Measured performances are clearly competitive with most commercially available Integrated Passive Device (IPD) solutions, which paves the way of FEM silicon SOCs.

Integration of cellular front end modules on advanced high resistivity SOI RF CMOS technology

Since integration drives wireless business in order to achieve the appropriate cost and form factor, we see significant research concerning front end module (FEM) integration on silicon [1]. In this quest, SOI technology has emerged as the technology of choice [2] since the antenna switch and the power amplifier (PA) have been successfully integrated on SOI [3, 4]. In this paper, we will focus our investigation on high performance passive functions in order to demonstrate the capability of SOI CMOS technology to integrate the whole FEM. To do so, balun, harmonic filter, diplexer and directional coupler have been achieved in a 130 nm SOI CMOS technology. Measured performances are clearly competitive with most commercially available Integrated Passive Device (IPD) solutions, which paves the way of FEM silicon SOCs.

Small-size low losses GSM and DCS harmonic filters integrated in a low cost 130 nm high resistivity SOI CMOS technology

RF front end modules (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, we see significant research concerning FEM integration on silicon [1]. In this quest, SOI technology has already addressed two key blocks, the antenna switch and the power amplifier. In this paper, we will focus our investigation on high performance passives functions in order to demonstrate the capability of SOI CMOS technology to integrate the whole FEM. To do so, GSM and DCS harmonic filters have been achieved in a 130 nm SOI CMOS technology. Measured performances (insertion losses ∼1dB and harmonic rejection greater than 30 dB) are clearly competitive with most commercially available Integrated Device Passive (IPD) solutions.

SOI CMOS technology for wireless applications: Current trends and perspectives

During the past years, SOI technology has been widely adopted by our industry for the integration of RF front-end modules (FEMs), mainly for antenna switches. This paper reviews the current trends concerning the integration of FEM on CMOS SOI and discusses the perspectives for SOI technology to be used more widely by the wireless industry in a short future.

3D group-cross symmetrical inductor: A new inductor architecture with higher self-resonance frequency and Q factor dedicated to advanced HR SOI CMOS technology

During past years, high resistivity (HR) SOI CMOS technology has emerged as a promising one for the integration of RF applications, mainly because of the improvement of passive component related to HR substrate. In this trend, 3D symmetrical spiral inductor (3DSI) has been proposed on SOI to lower the amount of area consumed by inductor while offering comparable performance than equivalent bulk technology. This paper presents a novel 3D structure group-cross symmetrical spiral inductor (3DGCSI), which has higher self-resonance frequency and quality factor, but has the same DC inductance and occupies the same layout area as 3DSI. Measurement data of 3DGCSI and 3DSI are compared with each other to show the advantages of this new inductor structure.