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Dive into the research topics where Hideshi Miyatake is active.

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Featured researches published by Hideshi Miyatake.


IEEE Journal of Solid-state Circuits | 1985

A reliable 1-Mbit DRAM with a multi-bit-test mode

Masaki Kumanoya; Kazuyasu Fujishima; Hideshi Miyatake; Yasumasa Nishimura; Kazunori Saito; Takayuki Matsukawa; Tsutomu Yoshihara; Takao Nakano

A single 50V supply 1-Mb DRAM using a half V/SUB cc/ biased memory cell with a reduced electric field of 2 MV/cm and a shared sensing scheme for reasonable cell signal is described. A testability concept which allows 1/4 reduced test time, page/nibble functions including a continuous nibble mode, and an effective redundancy circuit are also described. A typical access time of 90 ns has been obtained using a titanium polycide world-line technology.


Archive | 1986

Dynamic RAM with active pull-up circuit

Hideto Hidaka; Kazuyasu Fujishima; Masaki Kumanoya; Hideshi Miyatake; Katsumi Dosaka; Yasuhiro Konishi


Electronics and Communications in Japan Part Ii-electronics | 1989

An optimized design for high‐performance megabit DRAMs

Masaki Kumanoya; Katsumi Dosaka; Yashuhiro Konishi; Tsutomu Yoshihara; Hideshi Miyatake; Yuto Ikeda; Isao Furuta


Electronics and Communications in Japan Part Ii-electronics | 1988

On-chip multibit-test scheme for VLSI memories

Hideto Hidaka; Kazuyasu Fujishima; Masaki Kumanoya; Hideshi Miyatake; Katsumi Dosaka; Yasumasa Nishimura; Tsutomu Yoshihara


Archive | 1988

Dynamischer direktzugriffsspeicher Dynamic random access memory

Hideshi Miyatake; Masaki Kumanoya; Hideto Hidaka; Hiroyuki Yamasaki; Yasuhiro Konishi; Yuto Ikeda


Archive | 1986

Blindwortleitungstreiberstromkreis fuer einen dynamischen mos-ram Dummy word line driver circuit for a dynamic mos-ram

Kazuyasu Fujishimaa; Masaki Kumanoya; Hideshi Miyatake; Hideto Hidaka; Katsumi Dosaka; Tsutomu Yoshihara


Archive | 1986

Halbleiter-speicherelement Semiconductor memory element

Hideto Hidaka; Kazuyasu Fujishima; Masaki Kumanoya; Hideshi Miyatake; Katsumi Dosaka; Tsutomu Yoshihara


Archive | 1985

Halbleiterspeicheranordnung. Semiconductor memory device.

Hideshi Miyatake; Kazuyasu Fujishima; Kazuhiro Shimotori


Archive | 1985

Dynamische speichervorrichtung Dynamic memory device

Hideshi Miyatake; Kazuyasu Fujishima; Tsutomu Yoshihara; Masaki Kumanoya; Hideto Hidaka; Katsumi Dosaka


Archive | 1985

Halbleiterspeichereinheit Semiconductor memory unit

Kazuyasu Fujishima; Masaki Kumanoya; Hideshi Miyatake; Hideto Hidaka; Katsumi Dosaka; Tsutomu Yoshihara

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