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international electron devices meeting | 1981

Design for alpha immunity of MOS dynamic RAM's

Kazumichi Mitsusada; Hisao Katto; Toru Toyabe

Soft error rate(SER) analysis model named HSERAM has been developed to provide a design tool for alpha immunity of MOS dynamic RAMs. The model is verified through the good agreement between the simulated and the measured SER of 64K bit dynamic RAMs. The SER of the metal folded-bit-line structure is compared around 10 times favorably with that of the diffused open-bit-line one in case of the same signal charge. Accelerated testing with increased alpha flux is risky for bit line mode soft error with large signal charge because of few alpha particles of low angle incidence which are most harmful in package mounted devices. Also shown briefly are the effectiveness of a protective coating to reduce SER and the measurement techniques easily equipped to detect 10-5ppm level of U and Th in semiconductor component materials.


Archive | 1982

Semiconductor device including an alpha-particle shield

Kanji Otsuka; Kazumichi Mitsusada; Masao Sekibata; Shinji Ohnishi


Archive | 1995

Method of fabrication of semiconductor integrated circuit device

Hidetoshi Iwai; Kazumichi Mitsusada; Masamichi Ishihara; Tetsuro Matsumoto; Kazuyuki Miyazawa; Hisao Katto; Kousuke Okuyama


Archive | 1992

Semiconductor integrated circuit device having protective/output elements and internal circuits

Hidetoshi Iwai; Kazumichi Mitsusada; Masamichi Ishihara; Tetsuro Matsumoto; Kazuyuki Miyazawa; Hisao Katto; Kousuke Okuyama


Archive | 1995

Semiconductor integrated circuit device having output and internal circuit MISFETS

Hidetoshi Iwai; Kazumichi Mitsusada; Masamichi Ishihara; Tetsuro Matsumoto; Kazuyuki Miyazawa; Hisao Katto; Kousuke Okuyama


Archive | 1986

Semiconductor integrated circuit device having semi-insulator substrate

Yasushi Hatta; Kazumichi Mitsusada; Hirotoshi Tanaka; Takehisa Hayashi


Electronics and Communications in Japan Part I-communications | 1980

Alpha‐particle‐induced soft errors in high speed bipolar ram

Kazumichi Mitsusada; Yukio Katos; Kunihiko Yamaguchi; Masasaki Inadachis


Archive | 1993

Semiconductor integrated circuit device having input protective elements and internal circuits

Hidetoshi Iwai; Kazumichi Mitsusada; Masamichi Ishihara; Tetsuro Matsumoto; Kazuyuki Miyazawa; Hisao Katto; Kousuke Okuyama


Archive | 1980

Method of making semiconductor integrated circuit device

Katsumi Ogiue; Takahisa Nitta; Kazumichi Mitsusada; Masato Iwabuchi; Masanori Odaka


Archive | 1993

Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit

Hidetoshi Iwai; Kazumichi Mitsusada; Masamichi Ishihara; Tetsuro Matsumoto; Kazuyuki Miyazawa; Hisao Katto; Kousuke Okuyama

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