Kelvin Doong

Direct probing characterization vehicle test chip for wafer level exploration of transistor pattern on product chips

Due to recent changes in the manufacturing of FEOL (front end of line) layers it is increasingly difficult to provide rapid learning cycles required to drive yield improvement during new product introduction (NPI). The Direct Probe Characterization Vehicle (DPCV) Test Chip presented here provides direct access to thousands of transistors on a product chip. Only two masks are needed (contact & metal 1) to provide access to the DUTs of the unchanged FEOL layers of a product chip. The DPCV test chip is capable of matching the distribution of product transistor pattern. Measurement data indicate that corrective actions to the design and/or process recipes will reduce the gap between measured product chip transistors and their expected behavior based on SPICE simulations.

New visions for IC yield detractor detection

The observability of conventional electrical test site and imaging techniques needs to be extended and coupled with all of the actual product layout attributes in order to reflect the relevant yield detractors of the current technologies in production and development. This paper discusses new electrical test site strategies that have been recently developed and deployed developed for parametric yield detection and systematic hard defect detection by layout attribute. Such test structures are derived from the actual product and in some key cases also embedded in the product utilizing available space between the active circuitry and detected in-line with non-contact techniques.