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Dive into the research topics where S. St Onge is active.

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Featured researches published by S. St Onge.


bipolar/bicmos circuits and technology meeting | 1999

A 0.24 /spl mu/m SiGe BiCMOS mixed-signal RF production technology featuring a 47 GHz f/sub t/ HBT and 0.18 /spl mu/m L/sub ett/ CMOS

S. St Onge; David L. Harame; James S. Dunn; Seshadri Subbanna; David C. Ahlgren; G. Freeman; Basanth Jagannathan; J. Jeng; Kathryn T. Schonenberg; Kenneth J. Stein; R. Groves; D. Coolbaugh; Natalie B. Feilchenfeld; Peter J. Geiss; M. Gordon; Peter B. Gray; Douglas B. Hershberger; S. Kilpatrick; Robb Allen Johnson; Alvin J. Joseph; Louis D. Lanzerotti; John C. Malinowski; Bradley A. Orner; Michael J. Zierak

A new base-after-gate integration scheme has been developed to integrate a 47 GHz f/sub t/, 65 GHz F/sub max/SiGe HBT process with a 0.24 /spl mu/m CMOS technology having 0.18 /spl mu/m L/sub eff/ and 5 nm gate oxide. We discuss the benefits and challenges of this integration scheme which decouples the HBT from the CMOS thermal cycles. We also describe the resulting 0.24 /spl mu/m SiGe BiCMOS technology, BiCMOS 6HP, which includes a 7 nm dual gate oxide option and full suite of passive components. The technology provides a high level of integration for mixed-signal RF applications.


bipolar/bicmos circuits and technology meeting | 2006

Schottky Barrier Diodes for Millimeter Wave SiGe BiCMOS Applications

Robert M. Rassel; Jeffrey B. Johnson; Bradley A. Orner; Scott K. Reynolds; Mattias E. Dahlstrom; Jay Rascoe; Alvin J. Joseph; Brian P. Gaucher; James S. Dunn; S. St Onge

For the first time, a high performance, low leakage Schottky barrier diode (SBD) with cutoff frequency above 1.0 THz in a 130nm SiGe BiCMOS technology for millimeter-wave application is described. Device optimization has been evaluated by varying critical process and layout parameters such as, anode size, cathode depth, cathode resistivity, junction tailoring, and guardring optimization is investigated


international reliability physics symposium | 2000

Trends in silicon germanium BiCMOS integration and reliability

James S. Dunn; D. L. Harame; S. St Onge; Alvin J. Joseph; Natalie B. Feilchenfeld; K. Watson; Seshadri Subbanna; G. Freeman; Steven H. Voldman; David C. Ahlgren; Robb Allen Johnson

A base-after-gate integration scheme has been developed fora 0.25 /spl mu/m SiGe BiCMOS and the details of the approach are discussed. NPN device reliability is reviewed for high-frequency transistors. The reliability aspects associated with using SiGe for applications with high collector-base voltage with high emitter current are also explored. Finally, the ESD characteristics of the SiGe BiCMOS technology elements are summarized.


bipolar/bicmos circuits and technology meeting | 2002

High performance, low complexity 0.18 /spl mu/m SiGe BiCMOS technology for wireless circuit applications

Natalie B. Feilchenfeld; Louis D. Lanzerotti; David C. Sheridan; Ryan W. Wuthrich; Peter J. Geiss; D. Coolbaugh; Peter B. Gray; J. He; P. Demag; J. Greco; T. Larsen; V. Patel; Michael J. Zierak; Wade J. Hodge; Jay Rascoe; J. Trappasso; Bradley A. Orner; A. Norris; Douglas B. Hershberger; B. Voegeli; Steven H. Voldman; Robert M. Rassel; V. Ramachandrian; Michael L. Gautsch; Ebenezer E. Eshun; R. Hussain; D. Jordan; S. St Onge; James S. Dunn

High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that offers 3 different breakdown voltage NPNs; with the high performance device achieving F/sub t//F/sub max/ of 60/85 GHz with a 3.0 V BV/sub CEO/. In addition, a full suite of high performance passive devices complement the state-of-the-art SiGe wireless HBTs.


international reliability physics symposium | 2005

The influence of a silicon dioxide-filled trench isolation structure and implanted sub-collector on latchup robustness

Steven H. Voldman; Ephrem G. Gebreselasie; Louis D. Lanzerotti; T. Larsen; Natalie B. Feilchenfeld; S. St Onge; Alvin J. Joseph; James S. Dunn

This paper demonstrates the effect of a new low-cost oxide filled trench isolation structure, and implanted sub-collectors, on the latchup robustness. With scaling and focus on low-cost wireless technology, new technologies are being developed utilizing a shallower oxide-filled trench structure and low-doped implanted sub-collectors. In this paper, the first latchup measurements and corresponding new discoveries are shown, utilizing this new isolation structure and its integration with implanted sub-collectors. This paper compares latchup measurements with the base CMOS technology (e.g. standard dual well p-substrate base technology) to quantify the net improvement. The results are shown with trench isolation only, sub-collector only, and the combined effect of the trench isolation and sub-collector.


bipolar/bicmos circuits and technology meeting | 2004

A low complexity 0.13 /spl mu/ SiGe BiCMOS technology for wireless and mixed signal applications

Louis D. Lanzerotti; Natalie B. Feilchenfeld; D. Coolbaugh; James A. Slinkman; Peter B. Gray; David C. Sheridan; J. Higgins; Wade J. Hodge; M. Gordon; T. Larsen; Michael L. Gautsch; P. Lindgren; R. Murty; Jay Rascoe; K. Watson; T. Stamper; Ebenezer E. Eshun; J. He; K. Downes; Robert M. Rassel; J. Greco; B. Labelle; S. Sweeney; Kenneth J. Stein; R. Bolam; K. Vaed; B. Omer; Alvin J. Joseph; S. St Onge; J. Dunn

We present IBMs next-generation, cost-performance-optimized BiCMOS technology (BiCMOS 8WL) which combines a state-of-the-art suite of SiGe NPNs, foundry compatible 0.13 μm CMOS, and a rich set of modular passive devices. Intended for a wide variety of supply voltages, the technology, features three different performance NPNs and standard, dual oxide, zero V t , and junction isolated FETs. Optimized for wireless and mixed signal applications, BiCMOS 8WL will enable system on a chip integration for 3G cellular applications.


electronic components and technology conference | 1992

Design of precision capacitors for analog applications

S. St Onge; S. G. Franz; A. Puttlitz; A. Kalinoski; Brian Johnson; Badih El-Kareh

The authors describe and analyze two capacitors which are incorporated in a baseline BiCMOS technology without added process complexity. The first capacitor is formed between degenerated doped polysilicon and silicon. The second is formed between two degenerately doped polysilicon layers. In both structures, the insulator is a deposited or grown oxide. The sensitivity of the capacitor voltage coefficient to oxide thickness and surface dopant concentration is discussed theoretically and compared to measured data. The two capacitors are optimized to exhibit very low voltage coefficients.<<ETX>>


international reliability physics symposium | 2003

The influence of process and design of subcollectors on the ESD robustness of ESD structures and silicon germanium heterojunction bipolar transistors in a BiCMOS SiGe technology

Steven H. Voldman; Louis D. Lanzerotti; B. Ronan; S. St Onge; J. Dunn

This paper demonstrates the effect of process and design variations on the ESD robustness of both active and passive elements in 50, 120 and 200 GHz BiCMOS SiGe HBT processes. The influence of subcollector dopant type and concentration, and n-well on ESD robustness of SiGe HBT npn transistors, SiGe varactor structures, p/sup +//n-well/subcollector structures and n-well diode structures is shown. HBM and TLP ESD measurements are provided to evaluate the observation of lateral resistor ballasting in the subcollector region in these structures and its influence on ESD robustness.


bipolar/bicmos circuits and technology meeting | 2008

High and low density complimentary MIM capacitors fabricated simultaneously in advanced RFCMOS and BiCMOS technologies

Zhong-Xiang He; D. Daley; R. Bolam; D. Vanslette; F. Chen; E. Cooney; D. Mosher; Natalie B. Feilchenfeld; K.M. Newton; Ebenezer E. Eshun; Robert M. Rassel; John J. Benoit; D. Coolbaugh; S. St Onge; James S. Dunn

Two MIM capacitors with capacitance density of 11 and 0.48 fF/um2 were fabricated simultaneously using IBM-s 0.13 um SiGe 8 WL BiCMOS process. Results from DC parametric measurement indicate that these two capacitors compliment each other extremely well.


bipolar/bicmos circuits and technology meeting | 2008

A 0.24 μm SiGe BiCMOS technology featuring 6.5V CMOS, f T /f MAX of 15/14 GHz VPNP, and f T /f MAX of 60/125 GHz HBT

Panglijen Candra; Mattias E. Dahlstrom; Michael J. Zierak; Benjamin T. Voegeli; K. Watson; Peter B. Gray; Zhong-Xiang He; Robert M. Rassel; S. Von Bruns; Nicholas Theodore Schmidt; Renata Camillo-Castillo; R. Previty-Kelly; Michael L. Gautsch; A. Norris; M. Gordon; P. Chapman; Douglas B. Hershberger; J. Lukaitis; Natalie B. Feilchenfeld; Alvin J. Joseph; S. St Onge; James S. Dunn

For the first time, we report a 0.24 mum SiGe BiCMOS technology that offers full suite of active device including three distinct NPNs, a vertical PNP, CMOS supporting three different operating-voltages, and wide range of passive devices. In particular, this technology provides 6.5 V CMOS capability and VPNP with fT/fMAX of 15/14 GHz and BVCEO of 6.5 V which can be used to complement high breakdown NPN with fT of 30 GHz and BVceo of 6.0 V.

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