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Dive into the research topics where Tien Sheng Chao is active.

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Featured researches published by Tien Sheng Chao.


Applied Physics Letters | 2006

Complementary carbon nanotube-gated carbon nanotube thin-film transistor

Bae-Horng Chen; Horng-Chih Lin; Tiao-Yuan Huang; Jeng-Hua Wei; Hung-Hsiang Wang; Ming-Jinn Tsai; Tien Sheng Chao

We introduce, a complementary carbon nanotube (CNT)-gated CNT thin-film field effect transistor (FET). By using two perpendicularly crossed single-wall CNT (SWNT) bundles as the gate and the channel interchangeably, a sub-50nm complementary CNT-FET is demonstrated. It is found that the new CNT-FET shows acceptable FET characteristics by interchanging the roles of the gate and the channel. The unique dual functionality of the device will open up a new possibility and flexibility in the design of future complementary CNT electronic circuits.


Applied Physics Letters | 2006

Suppression of interfacial reaction for HfO2 on silicon by pre-CF4 plasma treatment

Chao-Sung Lai; Woei Cherng Wu; Tien Sheng Chao; Jian Hao Chen; Jer-Chyi Wang; Li-Lin Tay; N. L. Rowell

In this letter, the effects of pre-CF4 plasma treatment on Si for sputtered HfO2 gate dielectrics are investigated. The significant fluorine was incorporated at the HfO2∕Si substrate interface for a sample with the CF4 plasma pretreatment. The Hf silicide was suppressed and Hf–F bonding was observed for the CF4 plasma pretreated sample. Compared with the as-deposited sample, the effective oxide thickness was much reduced for the pre-CF4 plasma treated sample due to the elimination of the interfacial layer between HfO2 and Si substrate. These improved characteristics of the HfO2 gate dielectrics can be explained in terms of the fluorine atoms blocking oxygen diffusion through the HfO2 film into the Si substrate.


Applied Physics Letters | 2005

Characterization of CF4-plasma fluorinated HfO2 gate dielectrics with TaN metal gate

Chao-Sung Lai; Woei Cherng Wu; Jer-Chyi Wang; Tien Sheng Chao

In this paper, fluorine incorporation into the HfO2 gate dielectrics by post CF4 plasma treatment was proposed to improve the electrical characterization. TaN–HfO2–p-Si capacitors were demonstrated in this work. The characteristics of fluorinated HfO2 gate dielectrics were improved, including the capacitance-voltage hysteresis and current-voltage behaviors. This may be attributed to the fluorine incorporated into the HfO2 gate dielectrics as revealed by secondary ion mass spectroscopy. Moreover, the formation of Hf-F bonding was observed through electron spectroscopy for chemical analysis spectra.


IEEE Transactions on Electron Devices | 2008

Reliability Mechanisms of LTPS-TFT With

Ming Wen Ma; Chi Yang Chen; Woei Cheng Wu; Chun Jung Su; Kuo Hsing Kao; Tien Sheng Chao; Tan Fu Lei

In this paper, a comprehensive study of the reliability mechanisms of high-performance low-temperature polycrystalline-Si thin-film transistor (LTPS-TFT) with gate dielectric is reported for the first time. Various bias- and temperature-stress conditions, which correspond to positive-bias stress (PBS), positive-bias temperature instability (PBTI), negative-bias stress (NBS), negative-bias temperature instability (NBTI), and hot-carrier stress, are used to differentiate the distribution and mechanism of trap density states. The generation of deep-trap states of the effective interfacial layer (IL), tail-trap states of poly-Si grain boundaries, and electron trapping of the gate dielectric is observed for the PBS and PBTI of the LTPS-TFT. In addition, both the deep- and tail-trap states of the effective IL are generated under NBS and NBTI of the LTPS-TFT.


Applied Physics Letters | 1996

\hbox{HfO}_{2}

Tien Sheng Chao; M. C. Liaw; C. H. Chu; C. Y. Chang; Chen-Han Chien; C. P. Hao; T. F. Lei

The mechanism of the nitrogen co‐implant to suppress the boron penetration in p+‐polycrystalline silicon gate has been investigated. The nitrogen coimplant with the BF+2 combines with the boron to form a B–N complex which results in a retardation of boron diffusion. It is found that metal–oxide–silicon capacitors with nitrogen implantation show improved electrical properties.


Journal of The Electrochemical Society | 2007

Gate Dielectric: PBTI, NBTI, and Hot-Carrier Stress

Woei Cherng Wu; Chao-Sung Lai; Jer-Chyi Wang; Jian Hao Chen; Ming Wen Ma; Tien Sheng Chao

Downlo High-Performance HfO2 Gate Dielectrics Fluorinated by Postdeposition CF4 Plasma Treatment Woei Cherng Wu, Chao Sung Lai, Jer Chyi Wang, Jian Hao Chen, Ming Wen Ma, and Tien Sheng Chao Department of Electrophysics and Department of Electronic Engineering, National Chiao Tung University, Hsinchu, Taiwan Department of Electronic Engineering, Chang Gung University, Kwei-Shan, Tao-Yuan, Taiwan Nanya Technology Corporation, Kueishan, Taoyuan, Taiwan


Journal of Crystal Growth | 2003

Mechanism of nitrogen coimplant for suppressing boron penetration in p+‐polycrystalline silicon gate of p metal–oxide semiconductor field effect transistor

Xiaohua Wu; D. Landheer; M.J. Graham; Hua-Mao Chen; T.-Y. Huang; Tien Sheng Chao

Abstract The structure and thermal stability of ZrO 2 films grown on Si (1xa00xa00) substrates by metalorganic chemical vapor deposition have been studied by high-resolution transmission electron microscopy, selected area electron diffraction and X-ray energy dispersive spectroscopy. As-deposited films consist of tetragonal ZrO 2 nanocrystallites and an amorphous Zr silicate interfacial layer. After annealing at 850°C, some monoclinic phase is formed, and the grain size is increased. Annealing a ∼6xa0nm thick film at 850°C in O 2 revealed that the growth of the interfacial layer is at the expense of the ZrO 2 layer. In a 3.0xa0nm thick Zr silicate interfacial layer, there is a 0.9xa0nm Zr-free SiO 2 region right above the Si substrate. These observations suggest that oxygen reacted with the Si substrate to grow SiO 2 , and SiO 2 reacted with ZrO 2 to form a Zr silicate interfacial layer during the deposition and annealing. Oxygen diffusion through the tetragonal ZrO 2 phase was found to be relatively easier than through the monoclinic phase.


Journal of The Electrochemical Society | 1991

High-Performance HfO2 Gate Dielectrics Fluorinated by Postdeposition CF4 Plasma Treatment

Tien Sheng Chao; Chung Len Lee; Tan Fu Lei

The application of the multiple-angle incident ellipsometry to measure the ultrathin (< 100 A) oxide has been studied in this paper. First, four interfacial models are investigated by using a fitting scheme to fit ellipsometric data (h, ~) at various incident angles, and the abrupt model is found to be the most appropriate model to model the transition region of the SiO2-Si interface. The sensitivities on the incident angle and the errors induced by the ellipsometric parameter variations are also analyzed. Ellipsometry is applied to measure the native oxides of Si wafers after they are treated with different cleaning processes, and it is also applied to measure refractive indexes and thicknesses of ultrathin thermally grown SiO2. It is believed that these are the most accurately measured results on the refractive indexes of ultrathin oxides. Also, an empirical formula for thermal oxide growth in dry 02 is obtained.


international electron devices meeting | 1999

Structure and thermal stability of MOCVD ZrO2 films on Si (100)

Ching-Tzung Lin; M.Z. Yang; C.C. Yeh; L.J. Cheng; Tiao-Yuan Huang; Huang-Chung Cheng; Tien Sheng Chao; Chun-Yen Chang

A complete performance and reliability study on effects of different plasma treatments (NH/sub 3/ and N/sub 2/O), substrate types (oxidized silicon wafer and quartz), and crystallization methods (excimer laser annealing and solid phase crystallization) of low temperature polysilicon (LTPS, <600/spl deg/C) TFTs are reported. It is shown that devices made by different fabrication methods exhibit different degradation behaviors under various stressing conditions.


IEEE Transactions on Electron Devices | 1998

Measurement of Ultrathin (<100 Å) Oxide Films by Multiple‐Angle Incident Ellipsometry

Tan Fu Lei; Juing-Yi Cheng; Shyh Yin Shiau; Tien Sheng Chao; Chao-Sung Lai

This work examines the characteristics of polyoxides thermally grown and deposited on polished polysilicon films. A well-controlled chemical mechanical polishing (CMP) process is also presented to achieve a planar surface morphology for polysilicon films. The thermally-grown and deposited polyoxides on the polished polysilicon films exhibit a lower leakage current, higher dielectric breakdown field, higher electron barrier height, lower electron trapping rate, lower density of trapped charges, and markedly higher charge to breakdown (Q/sub bd/) than the conventional polyoxide. In particular, the deposited polyoxide on the polished polysilicon film has the highest dielectric breakdown field, lowest electron trapping rate, and highest charge to breakdown due to the planar polyoxide/polysilicon interface. In addition, experimental results indicate that the trapped charges of the polished samples are located in the polyoxides upper portion, which differs from conventional polyoxides. Undoubtedly, the deposited polyoxide on the polished polysilicon film considered herein is the most promising candidate to yield optimum characteristics of polyoxide.

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Tan Fu Lei

National Chiao Tung University

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Kuo Hsing Kao

National Cheng Kung University

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Ming Wen Ma

National Chiao Tung University

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Woei Cherng Wu

National Chiao Tung University

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Tiao-Yuan Huang

National Chiao Tung University

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Chung Len Lee

National Chiao Tung University

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Chun-Yen Chang

Industrial Technology Research Institute

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Chun Jung Su

National Chiao Tung University

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